Patents by Inventor Andrew Sturges

Andrew Sturges has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11288612
    Abstract: An on-demand transportation management system can collect historical data of harmful events of human-driven vehicles (HDVs) operating throughout a given region. For each road segment of the given region, the system can determine a fractional risk value for the HDVs, and based on the fractional risk value for each road segment, the system can route drivers within the given region along lowest risk route options.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: March 29, 2022
    Assignee: UATC, LLC
    Inventors: Dima Kislovskiy, David McAllister Bradley, Andrew Sturges
  • Publication number: 20180341888
    Abstract: An on-demand transportation management system can collect historical data of harmful events of human-driven vehicles (HDVs) operating throughout a given region. For each road segment of the given region, the system can determine a fractional risk value for the HDVs, and based on the fractional risk value for each road segment, the system can route drivers within the given region along lowest risk route options.
    Type: Application
    Filed: May 23, 2017
    Publication date: November 29, 2018
    Inventors: Dima Kislovskiy, David McAllister Bradley, Andrew Sturges
  • Publication number: 20080034162
    Abstract: A cache system is provided which includes a cache memory and a cache refill mechanism which allocates one or more of a set of cache partitions in the cache memory to an item in dependence on the address of the item in main memory. This is achieved in one of the described embodiments by including with the address of an item a set of partition selector bits which allow a partition mask to be generated to identify into which cache partition the item may be loaded.
    Type: Application
    Filed: July 26, 2007
    Publication date: February 7, 2008
    Applicant: STMicroelectronics Limited
    Inventors: Andrew Sturges, David May
  • Publication number: 20050262329
    Abstract: A processor element, structured to execute a 32-bit fixed length instruction set architecture, is backward compatible with a 16-bit fixed length instruction set architecture by translating each of the 16-bit instructions into a sequence of one or more 32-bit instructions. Switching between 16-bit instruction execution and 32-bit instruction execution is accomplished by branch instructions that employ a least significant bit position of the address of the target of the branch to identify whether the target instruction is a 16-bit instruction or a 32-bit instruction.
    Type: Application
    Filed: August 19, 2003
    Publication date: November 24, 2005
    Applicant: Hitachi, Ltd.
    Inventors: Sivaram Krishnan, Mark Debbage, Sebastian Ziesler, Kanad Roy, Andrew Sturges, Prasenjit Biswas
  • Publication number: 20050132141
    Abstract: A cache system is provided which includes a cache memory and a cache refill mechanism which allocates one or more of a set of cache partitions in the cache memory to an item in dependence on the address of the item in main memory. This is achieved in one of the described embodiments by including with the address of an item a set of partition selector bits which allow a partition mask to be generated to identify into which cache partition the item may be loaded.
    Type: Application
    Filed: January 28, 2005
    Publication date: June 16, 2005
    Applicant: STMicroelectronics Limited (formerly SGS-Thomson Microelectronics Limited
    Inventors: Andrew Sturges, David May
  • Patent number: 6618833
    Abstract: A method of automated generation of a set of design data defining a system model from an architecture database which is configured to hold in an electronic storage medium architectural parameters wherein each architectural parameter is defined by a primary key field and a set of fields holding subsidiary data relating to the primary key, the method comprising, reading the primary key for each architectural parameter, generating in an electronic storage medium a structured definition entry of the architectural parameter in an electronically readable format, the structured definition entry being associated with an identification field defining the parameter, and loading the primary key into the identification field and the subsidiary data into the structured definition file, and wherein the structured definition entry takes the form of a programming definition of the architectural parameter in a modelling language.
    Type: Grant
    Filed: December 9, 1999
    Date of Patent: September 9, 2003
    Assignee: STMicroelectronics Limited
    Inventors: Mark Hill, Hendrick-Jan Agterkamp, Andrew Sturges
  • Patent number: 6438514
    Abstract: A computer is operated to generate electronic data defining a system model by loading into the computer a class definition defining instructions which are processed by the system, the definition including a set of functional methods to which the instruction is subjected by the system and a set of locations for members representing the instruction. A model execution program is then executed on the computer which calls the class definition for each instruction, invokes one of the functional methods and loads the locations of the entry with state information depending on the functional method to create a functional component. The functional component is loaded into memory and the state information of the functional component modified independence on a subsequently invoked functional method by the model execution program.
    Type: Grant
    Filed: November 22, 1999
    Date of Patent: August 20, 2002
    Assignee: STMicroelectronics Limited
    Inventors: Mark Hill, Hendrick-Jan Agterkamp, Andrew Sturges