Patents by Inventor Andrew Sun

Andrew Sun has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250381397
    Abstract: Disclosed herein are devices, systems, and methods for treating a medical condition through a coordinated stimulation of two or more target nerves using a head worn apparatus. The apparatus may include an electrode assembly for neural stimulation of a plurality of target nerves, a substrate; a set of electrodes, having: a set of frontal electrodes including a superior frontal electrode and an inferior frontal electrode, the set of frontal electrodes positioned on the substrate such that the set of frontal electrodes are configured to overlie or straddle a supraorbital trigeminal nerve branch of the subject; or a set of lateral electrodes including a concha electrode and a tragus electrode, the set of lateral electrodes positioned on the substrate such that the set of lateral electrodes are configured to overlie or straddle an auricular branch of the vagus nerve of the subject.
    Type: Application
    Filed: January 24, 2025
    Publication date: December 18, 2025
    Inventors: Kirt GILL, Joseph UPCHURCH, Andrew SUN
  • Patent number: 9906111
    Abstract: A set of symmetrically segmented square prism Permanent Magnet (PM) halves in a 45-45-90 triangular prism and a rectangular square prism with predefined 45° stepped magnetizations are designed as Fine Elements (FEs), bringing finely adaptive mosaicking advantages for array arrangement. Optimized Halbach effect FE PM pole modules in cuboidal and isosceles trapezoidal prism shapes are invented to provide an augmented one-side-operating field. Simulation data show that typical dual layer FE PM arrays generate high-fidelity sinusoidal waveforms within air-gaps with peak field strengths of up to 1.2 Tesla. Featuring a pole width-to-thickness ratio ranging from 1 to 6, FE PM motor tracks with a series of scale, format, and sectional features are constructed in lightweight ferrous and/or nonferrous structures, which energize OEM and/or FE current carrying winding coils to implement linear and curvilinear motors with high power/force/torque density and low force ripple.
    Type: Grant
    Filed: August 20, 2015
    Date of Patent: February 27, 2018
    Inventors: Xiuhong Sun, Andrew Sun
  • Publication number: 20160111948
    Abstract: A set of symmetrically segmented square prism Permanent Magnet (PM) halves in a 45-45-90 triangular prism and a rectangular square prism with predefined 45° stepped magnetizations are designed as Fine Elements (FEs), bringing finely adaptive mosaicking advantages for array arrangement. Optimized Halbach effect FE PM pole modules in cuboidal and isosceles trapezoidal prism shapes are invented to provide an augmented one-side-operating field. Simulation data show that typical dual layer FE PM arrays generate high-fidelity sinusoidal waveforms within air-gaps with peak field strengths of up to 1.2 Tesla. Featuring a pole width-to-thickness ratio ranging from 1 to 6, FE PM motor tracks with a series of scale, format, and sectional features are constructed in lightweight ferrous and/or nonferrous structures, which energize OEM and/or FE current carrying winding coils to implement linear and curvilinear motors with high power/force/torque density and low force ripple.
    Type: Application
    Filed: August 20, 2015
    Publication date: April 21, 2016
    Inventors: Xiuhong Sun, Andrew Sun
  • Publication number: 20160024362
    Abstract: The present invention relates, in part, to heat transfer systems, methods and compositions which utilize a heat transfer fluid comprising: (a) HFO-1234ze; (b) HFC-227ea; and (c) optionally HFC-134a, wherein HFO-1234ze and HFC-227ea are provided in effective amounts to form an azeotrope or azeotrope-like composition.
    Type: Application
    Filed: March 15, 2013
    Publication date: January 28, 2016
    Inventors: LU Zhili, Jun LIU, Samuel F. YANA MOTTA, Xiangrui WANG, Yongming NIU, Andrew SUN, Mark W. SPATZ, Robert G. RICHARD, SETHI Ankit
  • Publication number: 20090095014
    Abstract: There is a working fluid for a heating and cooling. The fluid is a blend of from about 1% to about 98% by weight 1,1,1,2,3,3,3-heptafluoropropane, from about 1% to about 98% by weight 1,1,1,3,3,3-hexafluoropropane, and from about 1% to about 98% by weight 1,1,1,2-tetrafluoroethane. The 1,1,1,2,3,3,3-heptafluoropropane, 1,1,1,3,3,3-hexafluoropropane, and 1,1,1,2-tetrafluoroethane are from about 90% or more by weight of the blend. There are also an apparatus that uses the blend and methods for heating and cooling using the blend.
    Type: Application
    Filed: October 7, 2008
    Publication date: April 16, 2009
    Inventors: Andrew Sun, Ke Zhang
  • Publication number: 20090049856
    Abstract: There is a working fluid for a heating and cooling. The fluid is a blend of about 1% to about 98% by mass 1,1,1,3,3-pentafluoropane, about 1% to about 98% by mass 1,1,1,2,3,3-hexafluoropropane, and about 1% to about 98% by mass 1,1,1,2-tetrafluoroethane. The 1,1,1,3,3-pentafluoropane, 1,1,1,2,3,3-hexafluoropropane, and 1,1,1,2-tetrafluoroethane are about 90% or more by mass of the blend. There are also an apparatus that uses the blend and methods for heating and cooling using the blend.
    Type: Application
    Filed: August 20, 2007
    Publication date: February 26, 2009
    Inventor: Andrew Sun
  • Patent number: 7149881
    Abstract: A method and apparatus for improving dispersal performance of instruction threads is described. In one embodiment, the dispersal logic determines whether the instructions supplied to it include any NOP instructions. When a NOP instruction is detected, the dispersal logic places the NOP into a no-op port for execution. All other instructions are distributed to the proper execution pipes in a normal manner. Because the NOP instructions do not use the execution resources of other instructions, all instruction threads can be executed in one cycle.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: December 12, 2006
    Assignee: Intel Corporation
    Inventors: Sailesh Kottapalli, Udo Walterscheidt, Andrew Sun, Thomas Yeh, Kinkee Sit
  • Publication number: 20040187132
    Abstract: A method and apparatus for improving dispersal performance of instruction threads is described. In one embodiment, the dispersal logic determines whether the instructions supplied to it include any NOP instructions. When a NOP instruction is detected, the dispersal logic places the NOP into a no-op port for execution. All other instructions are distributed to the proper execution pipes in a normal manner. Because the NOP instructions do not use the execution resources of other instructions, all instruction threads can be executed in one cycle.
    Type: Application
    Filed: March 19, 2004
    Publication date: September 23, 2004
    Inventors: Sailesh Kottapalli, Udo Walterscheidt, Andrew Sun, Thomas Yeh, Kinkee Sit
  • Patent number: 6721873
    Abstract: A method and apparatus for improving dispersal performance of instruction threads is described. In one embodiment, the dispersal logic determines whether the instructions supplied to it include any NOP instructions. When a NOP instruction is detected, the dispersal logic places the NOP into a no-op port for execution. All other instructions are distributed to the proper execution pipes in a normal manner. Because the NOP instructions do not use the execution resources of other instructions, all instruction threads can be executed in one cycle.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: April 13, 2004
    Assignee: Intel Corporation
    Inventors: Sailesh Kottapalli, Udo Walterscheidt, Andrew Sun, Thomas Yeh, Kinkee Sit
  • Publication number: 20020087835
    Abstract: A method and apparatus for improving dispersal performance of instruction threads is described. In one embodiment, the dispersal logic determines whether the instructions supplied to it include any NOP instructions. When a NOP instruction is detected, the dispersal logic places the NOP into a no-op port for execution. All other instructions are distributed to the proper execution pipes in a normal manner. Because the NOP instructions do not use the execution resources of other instructions, all instruction threads can be executed in one cycle.
    Type: Application
    Filed: December 29, 2000
    Publication date: July 4, 2002
    Inventors: Sailesh Kottapalli, Udo Walterscheidt, Andrew Sun, Thomas Yeh, Kinkee Sit