Patents by Inventor Andrew Thye Shen Wee

Andrew Thye Shen Wee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7388201
    Abstract: A radiation detector has an electron emitter that includes a coated nanostructure on a support. The nanostructure can include a plurality of nanoneedles. A nanoneedle is a shaft tapering from a base portion toward a tip portion. The tip portion has a diameter between about 1 nm to about 50 nm and the base portion has a diameter between about 20 nm to about 300 nm. Each shaft has a length between about 100 nm to about 3,000 nm and an aspect ratio larger than 10. A coating covers at least the tip portions of the shafts. The coating exhibits negative electron affinity and is capable of emitting secondary electrons upon being irradiated by radiation. The nanostructure can also include carbon nanotubes (CNTs) coated with a material selected from the group of aluminum nitride (AlN), gallium nitride (GaN), and zinc oxide (ZnO).
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: June 17, 2008
    Assignees: National University of Singapore, Agency for Science, Technology and Research, Pohang University of Science and Technology, Nanyang Technological University
    Inventors: Marian Cholewa, Shu Ping Lau, Gyu-Chul Yi, Jin Kyoung Yoo, Adrian Paul Burden, Lei Huang, Xingyu Gao, Andrew Thye Shen Wee, Herbert Oskar Moser
  • Patent number: 6335253
    Abstract: A new method of forming MOS transistors with shallow source and drain extensions and self-aligned silicide in the has been achieved. Gates are provided overlying a semiconductor substrate. Temporary sidewall spacers are formed on the gates. Ions are implanted into the semiconductor substrate and the polysilicon layer to form deep amorphous layers beside the spacers and shallow amorphous layers under the spacers. The spacers are removed. Ions are implanted to form lightly doped junctions in the shallower amorphous layer. Permanent sidewall spacers are formed on the gates. Ions are implanted to form heavily doped junctions in the deeper amorphous layer. A metal layer is deposited. A capping layer is deposited to protect the metal layer during irradiation. The integrated circuit device is irradiated with laser light to melt the amorphous layer while the crystalline polysilicon and semiconductor substrate remain in solid state.
    Type: Grant
    Filed: July 12, 2000
    Date of Patent: January 1, 2002
    Assignees: Chartered Semiconductor Manufacturing Ltd., National University of Singapore
    Inventors: Yung Fu Chong, Kin Leong Pey, Alex See, Andrew Thye Shen Wee