Abstract: A multi-stage channel select filter and associated methods are disclosed that can be used, for example, with receiver architectures and associated methods that are also described herein. The multi-stage channel select filter can include a plurality of cascaded stages including at least one tunable stage. Each stage can include a digital mixer, a low pass filter and a decimator, with the decimator for each tunable stage including a tunable decimator having a decimation rate selection signal as an input. In addition, each non-tunable stage, if any are utilized, can include a decimator having a fixed decimation rate. In operation, the first cascaded stage is configured to receive a digitized channel signal spectrum, and the last cascaded change is configured to output a baseband signal representative of a desired channel within the digitized channel spectrum.

Abstract: Methods and architectures for tuning bandpass analog-to-digital converters (ADCs) are disclosed that can be used, for example, with receiver architectures and associated methods that are also disclosed. The notch of the bandpass ADC can be tuned to the desired channel frequency by adjusting the notch to reduce noise energy in the output signal through a feedback process that adjusts the tuning signal. In addition, a master-slave approach can be implemented to tune a tunable bandpass filter configured as a slave circuit based upon the tuning adjustments made to the master bandpass ADC circuit. In addition, receiver architectures and associated methods are disclosed that utilize coarse analog tune circuitry to provide initial analog coarse tuning of desired channels within a received spectrum signal, such as a set-top box signal spectrum for satellite communications.

Abstract: Receiver architectures and associated methods are disclosed that provide initial analog coarse tuning of desired channels within a received signal spectrum, such as a set-top box signal spectrum for satellite communications. These architectures provide significant advantages over prior direct down-conversion (DDC) architectures and low intermediate-frequency (IF) architectures, particularly where two tuners are desired on the same integrated circuit. Rather than using a low-IF frequency or directly converting the desired channel frequency to DC, initial coarse tuning provided by analog coarse tuning circuitry allows for a conversion to a frequency range around DC. This coarse tuning circuitry can be implemented, for example, using a large-step local oscillator (LO) that provides a coarse tune analog mixing signal.

Abstract: A CMOS implementation for a DC holding circuit in direct access arrangement (DAA) circuitry is disclosed that provides desirable inductive behavior while minimizing power dissipation required by the CMOS integrated circuit, particularly at high loop currents. The DC holding circuitry disclosed may include MOS transistors located on a CMOS integrated circuit and an off-chip power dissipating resistor that acts to dissipate power external to the CMOS integrated circuit. The CMOS implementation disclosed also allows a path for drawing DC current to power other CMOS circuits (e.g., ADCs and DACs) in the CMOS integrated circuit.

Abstract: An improved modem architecture and associated method are disclosed that integrate modem functionality and line-side isolation functionality while also providing flow control of internal data between an isolation interface, digital-signal-processor (DSP) circuitry, and an analog input. The integrated modem and line-isolation circuit may also have an analog output for which data flow control is also provided.

Abstract: An improved modem architecture and associated method are disclosed that integrate modem and line-isolation circuitry so as to achieve modem functionality and system-side isolation functionality on a single integrated circuit.

Abstract: An improved digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the calibrated ADC offset signal during normal operation of the isolation barrier system. A modified hybrid circuit is provided for isolating the system input from the telephone line during calibration, and for completing the calibration loop. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.

Abstract: A communication system is provided with a power supply budget such that portions of a phone line side circuit may be powered from the TIP and RING phone lines while using standard electronic devices for the hookswitch circuits and the diode bridge circuit. For example, low voltage converters in the phone line side circuit may be powered from the phone line. The low voltage converters may operate off a low voltage power supply of approximately 2.5 V or less, more preferably may operate off a low voltage power supply of approximately 2.0 V or less, and in one embodiment 1.9 V converters may be utilized. The communication system may further include a capacitive isolation barrier system for isolating the phone line side circuitry.

Abstract: Power-up and power-down transient suppression are provided for an audio digital-to-analog converter with a single ended output to prevent annoying pops which accompany switching an audio system on and off. Power-up suppression is achieved by clamping an output signal to ground, driving the audio channel to ground, releasing the clamp and driving the audio channel gradually to its quiescent (zero signal) value. Power-down suppression is provided by using a positive feedback amplifier to accelerate current drain initiated by a constant current source used to bleed off the charge on output capacitor. The audio digital-to-analog converter sets operational mode based on ratios of a master clock to a channel selection clock. The techniques disclosed apply readily to the outputs received from CDs, CD-ROMs, DAT and other digital recording media.

Abstract: An improved digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the calibrated ADC offset signal during normal operation of the isolation barrier system. A modified hybrid circuit is provided for isolating the system input from the telephone line during calibration, and for completing the calibration loop. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.

Abstract: An improved digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the calibrated ADC offset signal during normal operation of the isolation barrier system. A modified hybrid circuit is provided for isolating the system input from the telephone line during calibration, and for completing the calibration loop. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.

Abstract: A communication system having a framing pattern to frame data to be transmitted to a phone line is provided. The data may be framed on one side of an isolation barrier and a clock signal may be extracted from the framed data stream on the other side of the barrier. The data to be framed is provided from an output of a delta-sigma modulator and the framing pattern utilized is a pattern that is unlikely to match the data stream output of the modulator. Thus, an erroneous detection of the framing pattern is unlikely to occur. The framing pattern is chosen to correspond to the expected modulator output for a full scale input signal that is at a frequency higher than the maximum actual frequency of the input data provided to the modulator.

Abstract: A method and apparatus are provided for reducing the amplitude of signals that often are inadvertently coupled to a telephone line from an isolation barrier system, or that cause undesirable interference within the circuitry of the isolation barrier system. Such signals have undesirable peaks in the frequency domain (spectral peaks) due to the existence of periodicities in the data signal that is transmitted across the isolation barrier. Such spectral peaks are reduced by this invention, which comprises randomizing or scrambling the data signal before it crosses the isolation barrier, and descrambling the data after it has crossed the isolation barrier. In one embodiment, the data signal is scrambled by combining it with a random bit stream (or a pseudo random bit stream), which effectively “whitens” the resulting scrambled signal, thus removing spectral peaks that exist in the original data signal.

Abstract: A digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the ADC offset signal during normal operation of the isolation barrier system. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.

Abstract: An improved modem architecture and associated method are disclosed that integrate modem functionality and line-side isolation functionality while allowing control of modem processing so that it may be bypassed if raw data, such as raw pulse-code-modulated (PCM) data, is desired to be transmitted or received.

Abstract: A digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the ADC offset signal during normal operation of the isolation barrier system. The offset calibration system includes a coarse offset signal generator which provides ;elected increments of offset voltage to the ADC outside of the outgoing data signal channel, In order to increase the calibration range and to avoid injecting large offset voltages into the outgoing data channel. Fixed bias signals are also provided for the ADC and for a DAC in the system.

Abstract: Power-up and power-down transient suppression are provided for an audio digital-to-analog converter with a single ended output to prevent annoying pops which accompany switching an audio system on and off. Power-up suppression is achieved by clamping an output signal to ground, driving the audio channel to ground, releasing the clamp and driving the audio channel gradually to its quiescent (zero signal) value. Power-down suppression is provided by using a positive feedback amplifier to accelerate current drain initiated by a constant current source used to bleed off the charge on output capacitor. The audio digital-to-analog converter sets operational mode based on ratios of a master clock to a channel selection clock.

Abstract: Monitor circuitry is disclosed that produces a loop current monitor signal indicative of the DC loop current passing through DC holding circuitry, which may be part of phone line side circuitry that may be connected to phone lines. This loop current monitor signal may be digitized and then communicated across an isolation barrier to powered side circuitry as digital information representative of the DC loop current levels in the phone lines. Example embodiments for the monitor circuitry are also disclosed, such as a MOS transistor, for which the monitor signal is the drain current of the MOS transistor, and an external resistor, for which the monitor signal is a voltage associated with the external resistor.

Abstract: An analog successive approximation (SAR) analog-to-digital converter (ADC) is disclosed that is a compromise between a SAR ADC implementation and a fully parallel thermometer-to-binary ADC. The analog SAR ADC utilizes N comparators for N bits of output and does not require a clock system, control logic, decode logic, or thermometer-to-binary decode circuitry. Conversion speed is determined by the comparator rate, and the comparator outputs may be used directly as the ADC outputs. The analog SAR ADC disclosed is a low complexity, low-precision analog-to-digital converter (ADC) that may be used to digitize phone line status information so that it may be communicated across a isolation barrier as digital information.

Abstract: A digital capacitive isolation barrier system is provided that is suitable for use in a telephone or modem where the locally powered circuits must be effectively isolated from the public telephone system, while permitting data transfer across the barrier. In particular, an automatic ADC offset calibration system is provided for determining the magnitude of the ADC offset signal required in the system during a calibration operation, and for providing the ADC offset signal during normal operation of the isolation barrier system. Fixed bias signals are also provided for the ADC and for a DAC in the system. In a preferred embodiment, the ADC is located on the isolated side of the isolation barrier, while the integrator and register that determine and hold the offset signal are located on the powered side of the isolation barrier.