Abstract: In accordance with embodiments, there are provided mechanisms and methods for generating a set of instructions to an on-demand database service. These mechanisms and methods for generating a set of instructions to an on-demand database service can enable embodiments to generate instructions capable of operating on objects, without having any knowledge of the objects on which the instructions are going to operate, until runtime. The ability of embodiments to provide this instruction generation may allow generic instructions to be generated, independent of the objects on which they will operate.

Abstract: A sophisticated high-k metal gate electrode structure may be formed after the deposition of a first part of an interlayer dielectric material, thereby providing a high degree of process compatibility with conventional CMOS techniques. Thus, sophisticated strain-inducing mechanisms may be readily implemented in the overall process flow, while nevertheless avoiding any high temperature processes during the formation of the sophisticated high-k dielectric gate stack.

Abstract: In the process sequence for replacing conventional gate electrode structures by high-k metal gate structures, the number of additional masking steps may be maintained at a low level, for instance by using highly selective etch steps, thereby maintaining a high degree of compatibility with conventional CMOS techniques. Furthermore, the techniques disclosed herein enable compatibility to front-end process techniques and back-end process techniques, thereby allowing the integration of well-established strain-inducing mechanisms in the transistor level as well as in the contact level.

Abstract: In accordance with embodiments, there are provided mechanisms and methods for editing an on-demand database service graphical user interface. These mechanisms and methods for editing an on-demand database service graphical user interface can enable embodiments to edit desired portions of the interface, in a more flexible manner. The ability of embodiments to provide such additional flexibility may lead to more efficient and effective interface editing.

Abstract: An MOS device having enhanced mobility and a method for its fabrication are provided. The method comprises providing a P-type monocrystalline silicon germanium substrate having a first lattice constant and a channel region at the substrate surface, forming a gate insulator layer on the substrate, forming a gate electrode having a first sidewall and a second sidewall overlying the channel. First and second recesses are etched into the substrate in alignment with the first and the second gate electrode sidewalls, respectively. The recesses are filled by epitaxially growing a layer of embedded monocrystalline semiconductor material characterized by a second lattice constant less than the first lattice constant to impart a tensile strain on the channel region.

Abstract: A method for forming a field effect transistor (FET) device includes forming a gate conductor and gate dielectric on an active device area of a semiconductor wafer, the semiconductor wafer including a buried insulator layer formed over a bulk substrate and a semiconductor-on-insulator layer initially formed over the buried insulator layer. Source and drain extensions are formed in the semiconductor-on-insulator layer, adjacent opposing sides of the gate conductor, and source and drain sidewall spacers are formed adjacent the gate conductor. Remaining portions of the semiconductor-on-insulator layer adjacent the sidewall spacers and are removed so as to expose portions of the buried insulator layer. The exposed portions of the buried insulator layer are removed so as to expose portions of the bulk substrate. A semiconductor layer is epitaxially grown on the exposed portions of the bulk substrate and the source and drain extensions, and source and drain implants are formed in the epitaxially grown layer.

Abstract: Methods for manufacturing an integrated circuit are provided. An exemplary method comprises the step of providing a silicon substrate having a first crystalline orientation. A silicon layer having a second crystalline orientation is bonded to the silicon substrate. The second crystalline orientation is different from the first crystalline orientation. The silicon layer is etched to expose a portion of the silicon substrate and an amorphous silicon layer is deposited on the exposed portion. The amorphous silicon layer is transformed into a regrown crystalline silicon layer having the first crystalline orientation. A first field effect transistor is formed on the silicon layer and a second field effect transistor is formed on the regrown crystalline silicon layer.

Abstract: A semiconductor device comprising a substrate having a first crystal orientation is provided. A first insulating layer overlies the substrate and a plurality of silicon layers overlie the first insulating layer. A first silicon layer comprises silicon having a second crystal orientation and a crystal plane. A second silicon layer comprises silicon having the second crystal orientation and a crystal plane that is substantially orthogonal to the crystal plane of the first silicon layer. Because holes have higher mobility in the (110) plane than the (100) plane, while electrons have higher mobility in (100) plane than the (110) plane, semiconductor device performance can be enhanced by the selection of silicon layers with certain crystal plane orientations. In addition, a method of forming a semiconductor device is provided.

Abstract: A semiconductor device comprising a substrate having a first crystal orientation and an insulating layer overlying the substrate is provided. A plurality of silicon layers are formed overlying the insulating layer. A first silicon layer comprises silicon having the first crystal orientation and a second silicon layer comprises silicon having a second crystal orientation. In addition, a method of forming a semiconductor device providing a silicon-on-insulator structure comprising a substrate with a silicon layer overlying the substrate and a first insulating layer interposed therebetween is provided. An opening is formed in a first region of the silicon-on-insulator structure by removing a portion of the silicon layer and the first insulating layer to expose a portion of the substrate layer. Selective epitaxial silicon is grown in the opening. A second insulating layer is formed in the silicon grown in the opening to provide an insulating layer between the grown silicon in the opening and the substrate.

Abstract: The dissemination of gas turbine engine aviation fuels under shock conditions, particularly by forming mist particles, and the accompanying fire hazard, are reduced by dissolving in the fuel a soluble polymer of molecular weight greater than 10.sup.6 in such concentration that there is molecular overlap of the dissolved polymer in the fuel, the dissolved polymer being one containing polar groups which form bonds with each other when the fuel is subjected to shock.

Abstract: The dissemination of gas turbine aviation fuels under shock conditions, particularly and the accompanying fire hazard are reduced by dissolving in the fuel a segmented copolymer of ethylene and a higher olefine. The fuel may be gelled by the dissolved copolymer or if the molecular weight is greater than 10.sup.6 and the concentration of the polymer is such that its molecules overlap in the fuel, the fuel may be a liquid, but with a reduced tendency to form mist particles under shock conditions.

Abstract: A polymer is dissolved in a liquid hydrocarbon fuel which has a flash point of at least 90.degree. F and is of a type suitable for gas turbine aircraft engines in order to reduce the tendency of the fuel to particulate dissemination when the fuel is subjected to shock. The polymer has a viscosity average molecular weight greater than 10.sup.6 or an intrinsic viscosity greater than 2.5 dls./gm. and the amount of polymer is sufficient that there is molecular overlap of polymer molecules in the liquid.