Patents by Inventor Andrew Westmeyer

Andrew Westmeyer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8344452
    Abstract: An MOS transistor formed on a heavily doped substrate is described. Metal gates are used in low temperature processing to prevent doping from the substrate from diffusing into the channel region of the transistor.
    Type: Grant
    Filed: January 24, 2008
    Date of Patent: January 1, 2013
    Assignee: Intel Corporation
    Inventors: Nick Lindert, Justin K. Brask, Andrew Westmeyer
  • Publication number: 20080142840
    Abstract: An MOS transistor formed on a heavily doped substrate is described. Metal gates are used in low temperature processing to prevent doping from the substrate from diffusing into the channel region of the transistor.
    Type: Application
    Filed: January 24, 2008
    Publication date: June 19, 2008
    Inventors: Nick Lindert, Justin K. Brask, Andrew Westmeyer
  • Patent number: 7332439
    Abstract: An MOS transistor formed on a heavily doped substrate is described. Metal gates are used in low temperature processing to prevent doping from the substrate from diffusing into the channel region of the transistor.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: February 19, 2008
    Assignee: Intel Corporation
    Inventors: Nick Lindert, Justin K. Brask, Andrew Westmeyer
  • Publication number: 20070194391
    Abstract: The mobility of carriers may be increased in strained channel epitaxial source/drain transistors. Doped silicon material may be blanket deposited after removing ion implanted source/drain regions. The blanket deposition forms amorphous films over non-source/drain areas and crystalline films in source/drain regions. By using an etch which is selective to amorphous silicon, the amorphous material may be removed. This may avoid some problems associated with selective deposition of the doped silicon material.
    Type: Application
    Filed: April 24, 2007
    Publication date: August 23, 2007
    Inventors: Anand Murthy, Justin Brask, Andrew Westmeyer, Boyan Boyanov, Nick Lindert
  • Publication number: 20070105331
    Abstract: This invention adds to the art of replacement source-drain cMOS transistors. Processes may involve etching a recess in the substrate material using one equipment set, then performing deposition in another. Disclosed is a method to perform the etch and subsequent deposition in the same reactor without atmospheric exposure. In-situ etching of the source-drain recess for replacement source-drain applications provides several advantages over state of the art ex-situ etching. Transistor drive current is improved by: (1) Eliminating contamination of the silicon-epilayer interface when the as-etched surface is exposed to atmosphere and (2) Precise control over the shape of the etch recess. Deposition may be done by a variety of techniques including selective and non-selective methods. In the case of blanket deposition, a measure to avoid amorphous deposition in performance critical regions is also presented.
    Type: Application
    Filed: December 21, 2006
    Publication date: May 10, 2007
    Inventors: Anand Murthy, Glenn Glass, Andrew Westmeyer, Michael Hattendorf, Jeffrey Wank
  • Publication number: 20060148151
    Abstract: This invention adds to the art of replacement source-drain cMOS transistors. Processes may involve etching a recess in the substrate material using one equipment set, then performing deposition in another. Disclosed is a method to perform the etch and subsequent deposition in the same reactor without atmospheric exposure. In-situ etching of the source-drain recess for replacement source-drain applications provides several advantages over state of the art ex-situ etching. Transistor drive current is improved by: (1) Eliminating contamination of the silicon-epilayer interface when the as-etched surface is exposed to atmosphere and (2) Precise control over the shape of the etch recess. Deposition may be done by a variety of techniques including selective and non-selective methods. In the case of blanket deposition, a measure to avoid amorphous deposition in performance critical regions is also presented.
    Type: Application
    Filed: January 4, 2005
    Publication date: July 6, 2006
    Inventors: Anand Murthy, Glenn Glass, Andrew Westmeyer, Michael Hattendorf, Jeffrey Wank
  • Publication number: 20060131665
    Abstract: A method is described for manufacturing an n-MOS semiconductor transistor. Recesses are formed in a semiconductor substrate adjacent a gate electrode structure. Silicon is embedded in the recesses via a selective epitaxial growth process. The epitaxial silicon is in-situ alloyed with substitutional carbon and in-situ doped with phosphorus. The silicon-carbon alloy generates a uniaxial tensile strain in the channel region between the source and drain, thereby increasing electron channel mobility and the transistor's drive current. The silicon-carbon alloy decreases external resistances by reducing contact resistance between source/drain and silicide regions and by reducing phosphorous diffusivity, thereby permitting closer placement of the transistor's source/drain and channel regions.
    Type: Application
    Filed: January 20, 2006
    Publication date: June 22, 2006
    Inventors: Anand Murthy, Glenn Glass, Andrew Westmeyer, Michael Hattendorf, Tahir Ghani
  • Publication number: 20060134872
    Abstract: Some embodiments of the present invention include providing carbon doped regions and raised source/drain regions to provide tensile stress in NMOS transistor channels.
    Type: Application
    Filed: December 17, 2004
    Publication date: June 22, 2006
    Inventors: Michael Hattendorf, Jack Hwang, Anand Murthy, Andrew Westmeyer
  • Publication number: 20060068590
    Abstract: An MOS transistor formed on a heavily doped substrate is described. Metal gates are used in low temperature processing to prevent doping from the substrate from diffusing into the channel region of the transistor.
    Type: Application
    Filed: September 29, 2004
    Publication date: March 30, 2006
    Inventors: Nick Lindert, Justin Brask, Andrew Westmeyer
  • Publication number: 20050179066
    Abstract: The mobility of carriers may be increased in strained channel epitaxial source/drain transistors. Doped silicon material may be blanket deposited after removing ion implanted source/drain regions. The blanket deposition forms amorphous films over non-source/drain areas and crystalline films in source/drain regions. By using an etch which is selective to amorphous silicon, the amorphous material may be removed. This may avoid some problems associated with selective deposition of the doped silicon material.
    Type: Application
    Filed: February 17, 2004
    Publication date: August 18, 2005
    Inventors: Anand Murthy, Justin Brask, Andrew Westmeyer, Boyan Boyanov, Nick Lindert