Abstract: A method of continuous development of an internal threat scan engine based on an iterative quality assessment includes iteratively performing a dynamic assessment of a quality of a threat detection with a frequency defined for each of objects in an object collection, wherein a result of the dynamic assessment includes internal and external scan results of the objects and a consistency verdict of the internal and external scan results of the objects, changing a frequency of scanning iteration of the objects based on the consistency verdict of the external and internal scan results of the objects, classifying the objects based on the result of the dynamic assessment, and creating a development task including the internal and external scan results of the objects, meta-data of the objects, and automated test results to provide details for developing a software to fix inconsistency of the internal and external scan results.

Abstract: A consecutive Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier, a power splitter, a peak amplifier, and a phase compensator. The carrier amplifier receives a radio frequency signal with interposing any signal splitters. The power splitter splits an output of the carrier amplifier into first and second split signals. The phase compensator transfers the second split signal to the peak amplifier. The first split signal is combined with the output of the peak amplifier.

Abstract: A consecutive Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier, a power splitter, a peak amplifier, and a phase compensator. The carrier amplifier receives a radio frequency signal with interposing any signal splitters. The power splitter splits an output of the carrier amplifier into first and second split signals. The phase compensator transfers the second split signal to the peak amplifier. The first split signal is combined with the output of the peak amplifier.

Abstract: An integrated Doherty amplifier based on a multichip module structure is disclosed. The amplifier comprises an input integrated passive die including a Wilkinson power divider, a phase compensation circuit and input matching circuits for the main and peaking amplifiers based on lumped components, the active GaN HEMT die including the main device, a peaking device and a bondwire inductor connected between the drain terminals of the main and peaking devices, and an output matching network including a two-section matching circuit with low-pass and high-pass matching section operating as an impedance-transforming bandpass filter and a dc-feed power supply circuit based on lumped components and microstrip lines.

Abstract: A consecutive Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier, a power splitter, a peak amplifier, and a phase compensator. The carrier amplifier receives a radio frequency signal with interposing any signal splitters. The power splitter splits an output of the carrier amplifier into first and second split signals. The phase compensator transfers the second split signal to the peak amplifier. The first split signal is combined with the output of the peak amplifier.

Abstract: A 3-stage Doherty amplifier that includes a three-way splitter, a carrier amplifier, first to second peak amplifiers, and an output combiner is disclosed. The output combiner includes first to fifth transmission lines with a ?/4 electrical length except for that in a downstream of the second peak amplifier, which provides a ?/2 electrical length. By dividing the latter transmission line into two parts each having a ?/4 length, and setting impedance thereof in a relation of (Z1/Z3)2×(ZL/3), the output impedance of the respective amplifiers are common to each other to be Zo, where Z1, Z3, and ZL are impedance of the transmission liens in respective downstream sides of the amplifiers, that of the transmission line provided in the output, and the load impedance, respectively.

Abstract: An inverted three-stage Doherty amplifier is disclosed. The amplifier provides an input power divider, a carrier amplifier, two peak amplifiers, and an output combiner. The output combiner includes five quarter-wavelength (?/4) lines, three of which correspond to the three amplifiers, one of which combines an output of the carrier amplifier with an output of the first peak amplifier, and the last of which combines the combined output of the carrier amplifier and the first peak amplifier with an output of the second peak amplifier. The five ?/4 lines have respective impedances to optionally adjust the output impedance of the respective amplifiers.

Abstract: An N-way Doherty Amplifier (N>3) is disclosed. The Doherty Amplifier includes an N-way power divider that evenly divides an input signal, a delay adjustor, one carrier amplifier and N?1 peak amplifiers each including offset lines for converting amplifier output impedance thereof to be substantially short circuit when the amplifiers are turned off, and an output combiner including a common node. The carrier amplifier, the first peak amplifier, and the rest peak amplifiers are coupled with the common node directly, through one ?/4 line, and respective ?/4 lines connected in series to the common node, respectively. The delay adjustor makes up a number of ?/4 lines in respective paths.

Abstract: A consecutive Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier, a power splitter, a peak amplifier, and a phase compensator. The carrier amplifier receives a radio frequency signal with interposing any signal splitters. The power splitter splits an output of the carrier amplifier into first and second split signals. The phase compensator transfers the second split signal to the peak amplifier. The first split signal is combined with the output of the peak amplifier.

Abstract: A 3-stage Doherty amplifier that includes a three-way splitter, a carrier amplifier, first to second peak amplifiers, and an output combiner is disclosed. The output combiner includes first to fifth transmission lines with a ?/4 electrical length except for that in a downstream of the second peak amplifier, which provides a ?/2 electrical length. By dividing the latter transmission line into two parts each having a ?/4 length, and setting impedance thereof in a relation of (Z1/Z3)2×(ZL/3), the output impedance of the respective amplifiers are common to each other to be Z0, where Z1, Z3, and ZL are impedance of the transmission liens in respective downstream sides of the amplifiers, that of the transmission line provided in the output, and the load impedance, respectively.

Abstract: An inverted symmetrical four-stage Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier and a plurality of peak amplifiers. Outputs of the carrier amplifier and the peak amplifiers are provided to the combining unit through the offset unit including offset transmission lines each connected with the carrier amplifier and the peak amplifiers. The offset transmission lines have characteristic impedance and electrical lengths equal to each other such that the impedance seeing the amplifiers at the ends of the offset transmission lines become substantially short-circuited.

Abstract: An N-way Doherty Amplifier (N>3) is disclosed. The Doherty Amplifier includes an N-way power divider that evenly divides an input signal, a delay adjustor, one carrier amplifier and N-1 peak amplifiers each including offset lines for converting output impedance thereof to be substantially short circuit when the amplifiers are turned off, and an output combiner including a common node. The carrier amplifier, the first peak amplifier, and the rest peak amplifiers are coupled with the common node directly, through one ?/4 line, and respective ?/4 lines connected in series to the common node, respectively. The delay adjustor makes up a number of ?/4 lines in respective paths.

Abstract: An inverted three-stage Doherty amplifier is disclosed. The amplifier provides an input power divider, a carrier amplifier, two peak amplifiers, and an output combiner. The output combiner includes five quarter-wavelength (?/4) lines, three of which correspond to three amplifiers, one of rest two ?/4 lines combines an output of the carrier amplifier with an output of the first peak amplifier, the last ?/4 line combines the combined output of the carrier amplifier and the first peak amplifier with an output of the second peak amplifier. The five ?/4 lines have respective impedance to optionally adjust output impedance of the respective amplifiers.

Abstract: An inverted symmetrical four-stage Doherty amplifier is disclosed. The Doherty amplifier includes a carrier amplifier and a plurality of peak amplifiers. Outputs of the carrier amplifier and the peak amplifiers are provided to the combining unit through the offset unit including offset transmission lines each connected with the carrier amplifier and the peak amplifiers. The offset transmission lines have characteristic impedance and electrical lengths equal to each other such that the impedance seeing the amplifiers at the ends of the offset transmission lines become substantially short-circuited.