Patents by Inventor Andrey V. Zagrebelny
Andrey V. Zagrebelny has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10573720Abstract: Some embodiments include constructions which have platinum-containing structures. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures and across metal oxide. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures, across a first material retaining the platinum-containing structures, and across metal oxide liners along sidewalls of the platinum-containing structures and directly between the platinum-containing structures and the first material. Some embodiments include methods of forming platinum-containing structures. In some embodiments, first material is formed across electrically conductive structures, and metal oxide is formed across the first material. Openings are formed to extend through the metal oxide and the first material to the electrically conductive structures. Platinum-containing material is formed within the openings and over the metal oxide.Type: GrantFiled: August 15, 2017Date of Patent: February 25, 2020Assignee: Micron Technology, Inc.Inventors: Andrey V. Zagrebelny, Chet E. Carter, Andrew D. Carswell
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Publication number: 20170345910Abstract: Some embodiments include constructions which have platinum-containing structures. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures and across metal oxide. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures, across a first material retaining the platinum-containing structures, and across metal oxide liners along sidewalls of the platinum-containing structures and directly between the platinum-containing structures and the first material. Some embodiments include methods of forming platinum-containing structures. In some embodiments, first material is formed across electrically conductive structures, and metal oxide is formed across the first material. Openings are formed to extend through the metal oxide and the first material to the electrically conductive structures. Platinum-containing material is formed within the openings and over the metal oxide.Type: ApplicationFiled: August 15, 2017Publication date: November 30, 2017Applicant: Micron Technology, Inc.Inventors: Andrey V. Zagrebelny, Chet E. Carter, Andrew D. Carswell
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Patent number: 9755035Abstract: Some embodiments include constructions which have platinum-containing structures. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures and across metal oxide. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures, across a first material retaining the platinum-containing structures, and across metal oxide liners along sidewalls of the platinum-containing structures and directly between the platinum-containing structures and the first material. Some embodiments include methods of forming platinum-containing structures. In some embodiments, first material is formed across electrically conductive structures, and metal oxide is formed across the first material. Openings are formed to extend through the metal oxide and the first material to the electrically conductive structures. Platinum-containing material is formed within the openings and over the metal oxide.Type: GrantFiled: November 14, 2013Date of Patent: September 5, 2017Assignee: Micron Technology, Inc.Inventors: Andrey V. Zagrebelny, Chet E. Carter, Andrew D. Carswell
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Patent number: 9153451Abstract: A method of forming a planar surface for a semiconductor device structure. The method comprises forming a particle film comprising a plurality of discrete particles on a non-planar surface of a semiconductor device structure. The semiconductor device structure is subjected to at least one chemical-mechanical polishing process after forming the particle film on the non-planar surface of the semiconductor device structure. Methods of forming a semiconductor device structure are also described.Type: GrantFiled: December 12, 2012Date of Patent: October 6, 2015Assignee: Micron Technology, Inc.Inventors: Andrew Dennis Watson Carswell, Wayne Hai-Wei Huang, Siddartha Kondoju, Jin Lu, Suresh Ramakrishnan, Kozaburo Sakai, Sony Varghese, Andrey V. Zagrebelny
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Patent number: 8835891Abstract: Some embodiments include methods of patterning platinum-containing material. An opening may be formed to extend into an oxide. Platinum-containing material may be formed over and directly against an upper surface of the oxide, and within the opening. The platinum-containing material within the opening may be a plug having a lateral periphery. The lateral periphery of the plug may be directly against the oxide. The platinum-containing material may be subjected to polishing to remove the platinum-containing material from over the upper surface of the oxide. The polishing may delaminate the platinum-containing material from the oxide, and may remove the platinum-containing material from over the oxide with an effective selectivity for the platinum-containing material relative to the oxide of at least about 5:1. Some embodiments include methods of forming memory cells. Some embodiments include integrated circuitry having platinum-containing material within an opening in an oxide and directly against the oxide.Type: GrantFiled: December 20, 2013Date of Patent: September 16, 2014Assignee: Micron Technology, Inc.Inventors: Andrey V. Zagrebelny, Chet E. Carter
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Publication number: 20140162455Abstract: A method of forming a planar surface for a semiconductor device structure. The method comprises forming a particle film comprising a plurality of discrete particles on a non-planar surface of a semiconductor device structure. The semiconductor device structure is subjected to at least one chemical-mechanical polishing process after forming the particle film on the non-planar surface of the semiconductor device structure. Methods of forming a semiconductor device structure are also described.Type: ApplicationFiled: December 12, 2012Publication date: June 12, 2014Applicant: MICRON TECHNOLOGY, INC.Inventors: Andrew Dennis Watson Carswell, Wayne Hai-Wei Huang, Siddartha Kondoju, Jin Lu, Suresh Ramakrishnan, Kozaburo Sakai, Sony Varghese, Andrey V. Zagrebelny
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Publication number: 20140103285Abstract: Some embodiments include methods of patterning platinum-containing material. An opening may be formed to extend into an oxide. Platinum-containing material may be formed over and directly against an upper surface of the oxide, and within the opening. The platinum-containing material within the opening may be a plug having a lateral periphery. The lateral periphery of the plug may be directly against the oxide. The platinum-containing material may be subjected to polishing to remove the platinum-containing material from over the upper surface of the oxide. The polishing may delaminate the platinum-containing material from the oxide, and may remove the platinum-containing material from over the oxide with an effective selectivity for the platinum-containing material relative to the oxide of at least about 5:1. Some embodiments include methods of forming memory cells. Some embodiments include integrated circuitry having platinum-containing material within an opening in an oxide and directly against the oxide.Type: ApplicationFiled: December 20, 2013Publication date: April 17, 2014Applicant: Micron Technology, Inc.Inventors: Andrey V. Zagrebelny, Chet E. Carter
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Publication number: 20140070419Abstract: Some embodiments include constructions which have platinum-containing structures. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures and across metal oxide. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures, across a first material retaining the platinum-containing structures, and across metal oxide liners along sidewalls of the platinum-containing structures and directly between the platinum-containing structures and the first material. Some embodiments include methods of forming platinum-containing structures. In some embodiments, first material is formed across electrically conductive structures, and metal oxide is formed across the first material. Openings are formed to extend through the metal oxide and the first material to the electrically conductive structures. Platinum-containing material is formed within the openings and over the metal oxide.Type: ApplicationFiled: November 14, 2013Publication date: March 13, 2014Applicant: Micron Technology, Inc.Inventors: Andrey V. Zagrebelny, Chet E. Carter, Andrew D. Carswell
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Patent number: 8653494Abstract: Some embodiments include methods of patterning platinum-containing material. An opening may be formed to extend into an oxide. Platinum-containing material may be formed over and directly against an upper surface of the oxide, and within the opening. The platinum-containing material within the opening may be a plug having a lateral periphery. The lateral periphery of the plug may be directly against the oxide. The platinum-containing material may be subjected to polishing to remove the platinum-containing material from over the upper surface of the oxide. The polishing may delaminate the platinum-containing material from the oxide, and may remove the platinum-containing material from over the oxide with an effective selectivity for the platinum-containing material relative to the oxide of at least about 5:1. Some embodiments include methods of forming memory cells. Some embodiments include integrated circuitry having platinum-containing material within an opening in an oxide and directly against the oxide.Type: GrantFiled: February 28, 2013Date of Patent: February 18, 2014Assignee: Micron Technology, Inc.Inventors: Andrey V. Zagrebelny, Chet E. Carter
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Patent number: 8610280Abstract: Some embodiments include constructions which have platinum-containing structures. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures and across metal oxide. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures, across a first material retaining the platinum-containing structures, and across metal oxide liners along sidewalls of the platinum-containing structures and directly between the platinum-containing structures and the first material. Some embodiments include methods of forming platinum-containing structures. In some embodiments, first material is formed across electrically conductive structures, and metal oxide is formed across the first material. Openings are formed to extend through the metal oxide and the first material to the electrically conductive structures. Platinum-containing material is formed within the openings and over the metal oxide.Type: GrantFiled: September 16, 2011Date of Patent: December 17, 2013Assignee: Micron Technology, Inc.Inventors: Andrey V. Zagrebelny, Chet E. Carter, Andrew Carswell
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Publication number: 20130313718Abstract: A method of processing a substrate having integrated circuitry includes forming through-substrate vias partially through the substrate from a first side of the substrate. At least one through-substrate structure is formed partially through the substrate from the first substrate side. The at least one through-substrate structure extends deeper into the substrate than do the through-substrate vias. Substrate material is removed from a second side of the substrate to expose the through-substrate vias and the at least one through-substrate structure on the second substrate side. Additional implementations are disclosed. Integrated circuit substrates are disclosed independent of method of manufacture.Type: ApplicationFiled: May 24, 2012Publication date: November 28, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Sony Varghese, Andrew Carswell, Kozaburo Sakai, Andrey V. Zagrebelny, Wayne Huang, Jin Lu, Suresh Ramakrishnan
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Patent number: 8409960Abstract: Some embodiments include methods of patterning platinum-containing material. An opening may be formed to extend into an oxide. Platinum-containing material may be formed over and directly against an upper surface of the oxide, and within the opening. The platinum-containing material within the opening may be a plug having a lateral periphery. The lateral periphery of the plug may be directly against the oxide. The platinum-containing material may be subjected to polishing to remove the platinum-containing material from over the upper surface of the oxide. The polishing may delaminate the platinum-containing material from the oxide, and may remove the platinum-containing material from over the oxide with an effective selectivity for the platinum-containing material relative to the oxide of at least about 5:1. Some embodiments include methods of forming memory cells. Some embodiments include integrated circuitry having platinum-containing material within an opening in an oxide and directly against the oxide.Type: GrantFiled: April 8, 2011Date of Patent: April 2, 2013Assignee: Micron Technology, Inc.Inventors: Andrey V. Zagrebelny, Chet E. Carter
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Publication number: 20130069237Abstract: Some embodiments include constructions which have platinum-containing structures. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures and across metal oxide. In some embodiments, the constructions may have a planarized surface extending across the platinum-containing structures, across a first material retaining the platinum-containing structures, and across metal oxide liners along sidewalls of the platinum-containing structures and directly between the platinum-containing structures and the first material. Some embodiments include methods of forming platinum-containing structures. In some embodiments, first material is formed across electrically conductive structures, and metal oxide is formed across the first material. Openings are formed to extend through the metal oxide and the first material to the electrically conductive structures. Platinum-containing material is formed within the openings and over the metal oxide.Type: ApplicationFiled: September 16, 2011Publication date: March 21, 2013Applicant: MICRON TECHNOLOGY, INC.Inventors: Andrey V. Zagrebelny, Chet E. Carter, Andrew Carswell
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Publication number: 20120256150Abstract: Some embodiments include methods of patterning platinum-containing material. An opening may be formed to extend into an oxide. Platinum-containing material may be formed over and directly against an upper surface of the oxide, and within the opening. The platinum-containing material within the opening may be a plug having a lateral periphery. The lateral periphery of the plug may be directly against the oxide. The platinum-containing material may be subjected to polishing to remove the platinum-containing material from over the upper surface of the oxide. The polishing may delaminate the platinum-containing material from the oxide, and may remove the platinum-containing material from over the oxide with an effective selectivity for the platinum-containing material relative to the oxide of at least about 5:1. Some embodiments include methods of forming memory cells. Some embodiments include integrated circuitry having platinum-containing material within an opening in an oxide and directly against the oxide.Type: ApplicationFiled: April 8, 2011Publication date: October 11, 2012Applicant: MICRON TECHNOLOGY, INC.Inventors: Andrey V. Zagrebelny, Chet E. Carter
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Patent number: 6844262Abstract: A method of making a semiconductor structure includes determining a polish time which is sufficient to planarize a layer on a semiconductor substrate. The layer is polished for the polish time to planarize the layer, and then the layer is polished to a predetermined thickness. The semiconductor structures can be used to make a semiconductor device.Type: GrantFiled: August 31, 2001Date of Patent: January 18, 2005Assignee: Cypress Semiconductor CorporationInventors: Tuyen V. Nguyen, Andrey V. Zagrebelny, Gregg E. Robinson
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Patent number: 6833622Abstract: A dummy structure pattern for fabricating a substantially planar surface within an inactive region of a semiconductor topography is provided. In particular, a semiconductor topography is provided which includes an inactive region comprising a sacrificial annular dummy structure configured to surround an area larger than a square of a minimum critical dimension of a device arranged within an active region of the semiconductor topography. In a preferred embodiment, the area is exclusively designated for a formation of an isolation structure within the semiconductor substrate of the semiconductor topography. As such, a semiconductor topography is provided which includes a separate isolation structure arranged within a spacing of a contiguous isolation structure, which is arranged in a grid pattern within a portion of a semiconductor substrate. Moreover, a semiconductor device is provided which includes an inactive region with a plurality of similarly sized and uniformly arranged annular diffusion regions.Type: GrantFiled: February 27, 2003Date of Patent: December 21, 2004Assignee: Cypress Semiconductor Corp.Inventors: Andrey V. Zagrebelny, Daniel J. Arnzen, Yitzhak Gilboa