Abstract: The invention relates to a packet switching device having a switching network consisting of a plurality of bufferless switching matrices (6) and a plurality of switching controllers (7) connected to form a matrix or cascade and each associated with a switching matrix (6), the respective result being fed back to the at least one previous switching controller present in the matrix or cascade.

Abstract: The invention relates to a packet switching device comprising a plurality of line cards (1 and 2), each consisting of a port control system (6 and 7) for storing and arranging packets in output queues and for the clocked generation and amendment of weightings containing information about the states of the output queues, and comprising a plurality of switch cards (3 to 5), each consisting of a crosspoint matrix (8) and an arbiter (9) for controlling the crosspoint matrix (8). Herein, the port control systems (6 and 7) each transmit to the arbiter (9) an amended weighting selected from a Table using a round robin method (30).

Abstract: A local area ring network operating in the asynchronous transfer mode (ATM) has a plurality of stations and network interfaces (transceivers), each network interface having a send and a receive ring connection. Setting up a call, exchange of information during the call and call clear-down are effected digitally via the exchange of ATM cells in whose header logic trunk identifiers (virtual path identifier VPI and virtual channel identifier VCI) are stored. At least one network interface includes a converter for at least partly and reversibly converting available data bytes in the header of the ATM cell into an identifier specific to the network. A header translation table in the converter is updated during the call set-up or call clear-down phase.

Abstract: The invention relates to a packet switching device with a plurality of input and output ports and at least one switching unit (3 to 5) comprising a coupling matrix and an arbiter unit (9) for controlling the coupling matrix (8), wherein

Abstract: The invention relates to a packet switching device comprising at least one line card (1 and 2) which device has an output port with a port control (6 and 7) for storage and arrangement of packets in output queues and for generating at least one feedback information unit to inform an arbiter (9) of statuses of the output queues of the output port. The packet switching device also comprises at least one switch card (3 to 5) consisting of a crosspoint matrix and the arbiter (9) for controlling the crosspoint matrix (8).

Abstract: The invention relates to a packet switching device comprising a switching network consisting of a plurality of bufferless switching matrices and switching controllers connected to form a network and each associated with a switching matrix, the output of a switching controller being in each case connected with all the inputs of all parallel-connected switching controllers arranged in the following row.

Abstract: The invention relates to a packet switching arrangement comprising a switching network of a plurality of bufferless switching matrices (6) and a plurality of cascade switch controls (7) assigned to one switching matrix (6) each, which switch controls (7) respectively include

Abstract: The invention relates to a packet switching system comprising at least a coupling device which comprises a main memory for buffering packets arriving by auxiliary lines, a main memory controller for generating addresses for the packets to be stored in the main memory and for controlling the write and read operations of the packets and a demulfiplexer controlled by the main memory controller for transporting the packets by trunk lines. The main memory controller comprises an address memory for producing an address for a write operation, buffers assigned to each trunk line, for buffering the addresses produced by the address memory, and a decoding device. The decoding device is provided for selecting a buffer for an address to be stored in dependence on the destination of the packet, for selecting a buffer for producing an address for the read operation from the main memory and for accordingly controlling the demultiplexer.

Abstract: A communication network comprises a transceiver arranged for passing on signals, coming in via an incoming signal path, to an outgoing signal path. The transceiver is coupled by the incoming signal path to a first neighboring transceiver and by the outgoing signal path to another neighboring transceiver. The transceiver comprises an amplifier for amplifying the signals to be passed on. The transceiver is also coupled to a local power supply. The communication network is arranged for supplying remote supply power via the incoming signal path to the transceiver. The transceiver further comprises a coupling device which under normal circumstances is arranged for supplying local supply power from the local power supply to the amplifier and, when the local power supply fails, is arranged for supplying the remote supply power to the amplifier. As a result, the communication between the two neighboring transceivers is not deteriorated by a failure of the local power supply of the transceiver.

Abstract: Local area network operating in the asynchronous transfer mode (ATM) comprising a plurality of stations which are coupled each via a network interface, which interface comprises a coupling device and a control arrangement and transmits cells via the coupling device between send and receive ring lines, to at least one station and at least one control arrangement. A control arrangement comprises an access controller which is arranged for conveying, in dependence on the contents of the header field of a cell received from the coupling device, the cell or first parts of the cell and/or additional information to a bus system and units coupled to the bus system.