Patents by Inventor Andris Ezis

Andris Ezis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230056901
    Abstract: A method of integrating a phase change switch (PCS) into a Bipolar (Bi)/Complementary Metal Oxide Semiconductor (CMOS) (BiCMOS) process, comprises providing a base structure including BiCMOS circuitry on a semiconductor substrate, and forming on the base structure a dielectric contact window layer having metal through-plugs that contact the BiCMOS circuitry. The method includes constructing the PCS on the contact window layer. The PCS includes: a phase change region, between ohmic contacts on the phase change region, to operate as a switch controlled by heat. The method further includes forming, on the contact window layer and the PCS, a stack of alternating patterned metal layers and dielectric layers that interconnect the patterned metal layers, such that the stack connects a first of the ohmic contacts to the BiCMOS circuitry and provides connections to a second of the ohmic contacts and to the resistive heater.
    Type: Application
    Filed: November 7, 2022
    Publication date: February 23, 2023
    Inventors: Patrick B. Shea, Robert M. Young, Keith H. Chung, Andris Ezis, Ishan Wathuthanthri
  • Patent number: 11522010
    Abstract: A method of integrating a phase change switch (PCS) into a Bipolar (Bi)/Complementary Metal Oxide Semiconductor (CMOS) (BiCMOS) process, comprises providing a base structure including BiCMOS circuitry on a semiconductor substrate, and forming on the base structure a dielectric contact window layer having metal through-plugs that contact the BiCMOS circuitry. The method includes constructing the PCS on the contact window layer. The PCS includes: a phase change region, between ohmic contacts on the phase change region, to operate as a switch controlled by heat. The method further includes forming, on the contact window layer and the PCS, a stack of alternating patterned metal layers and dielectric layers that interconnect the patterned metal layers, such that the stack connects a first of the ohmic contacts to the BiCMOS circuitry and provides connections to a second of the ohmic contacts and to the resistive heater.
    Type: Grant
    Filed: August 19, 2019
    Date of Patent: December 6, 2022
    Assignee: Northrop Grumman Systems Corporation
    Inventors: Patrick B. Shea, Robert M. Young, Keith H. Chung, Andris Ezis, Ishan Wathuthanthri
  • Publication number: 20210057487
    Abstract: A method of integrating a phase change switch (PCS) into a Bipolar (Bi)/Complementary Metal Oxide Semiconductor (CMOS) (BiCMOS) process, comprises providing a base structure including BiCMOS circuitry on a semiconductor substrate, and forming on the base structure a dielectric contact window layer having metal through-plugs that contact the BiCMOS circuitry. The method includes constructing the PCS on the contact window layer. The PCS includes: a phase change region, between ohmic contacts on the phase change region, to operate as a switch controlled by heat. The method further includes forming, on the contact window layer and the PCS, a stack of alternating patterned metal layers and dielectric layers that interconnect the patterned metal layers, such that the stack connects a first of the ohmic contacts to the BiCMOS circuitry and provides connections to a second of the ohmic contacts and to the resistive heater.
    Type: Application
    Filed: August 19, 2019
    Publication date: February 25, 2021
    Inventors: Patrick B. Shea, Robert M. Young, Keith H. Chung, Andris Ezis, Ishan Wathuthanthri
  • Patent number: 4754312
    Abstract: This invention is directed to a three-terminal semiconductor device which acts as a differential light detector. It is based on the operation of two reverse biased PIN photodetectors where one receives light through its P-doped surface and the other through its N-doped surface. The device is configured to be compatible with applications in integrated optics and with fiber optics. In principle of operation the invention relies on the production and collection of electrons from the detection of a first light intensity and the production and collection of holes from the detection of the intensity of a second light. This is done in a connected or integrated semiconductor which allows the recombination of electrons and holes. The excess number of electrons or holes, depending upon which light is received with the greatest intensity, is extracted from the recombination region and is the basis for the output signal.
    Type: Grant
    Filed: April 7, 1987
    Date of Patent: June 28, 1988
    Assignee: The United States of America as represented by the Secretary of the Air Force
    Inventors: Dietrich W. Langer, Andris Ezis