Patents by Inventor Andrzei Zaleski

Andrzei Zaleski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5455791
    Abstract: A simple stacked gate Electrically Erasable Programmable Read Only Memory (EEPROM) device fabricated on Silicon-on-Insulator (SOI) substrates(films) and a method to erase data in such device as well as in any other EEPROM devices fabricated on SOI substrates(films) is described. The new EEPROM device incorporates two separate control gates, a front control gate and a back control gate. In the new erasing method the back control gate is used to operate back channel of the EEPROM device in the avalanche region and generate hot carriers subsequently injected into the floating gate. The new erasing method is applicable to either n-channel or p-channel, inversion, accumulation or depletion mode devices.
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: October 3, 1995
    Inventors: Andrzei Zaleski, Dimitris E. Ioannou