Abstract: An analog to digital converter comprising: a plurality of voltage generators, each voltage generator having a control input and being capable of generating an output whose voltage is dependent on a signal applied to the control input; a comparison stage arranged to compare the input signal with one or more outputs of the voltage generators and generate one or more comparator outputs indicative of the result(s) of the comparison(s); and a controller arranged to receive the comparator outputs, the controller being configured to: (i) signal the control inputs of a number V1 of the voltage generators, and estimate a number B1 of bits of the digital representation; and subsequently (ii) signal the control input(s) of a number V2 of the voltage generators, and estimate a number B2 of bits of the digital representation; wherein V2 is less than V1.

Abstract: An analog to digital converter comprising: a plurality of voltage generators, each voltage generator having a control input and being capable of generating an output whose voltage is dependent on a signal applied to the control input; a comparison stage arranged to compare the input signal with one or more outputs of the voltage generators and generate one or more comparator outputs indicative of the result(s) of the comparison(s); and a controller arranged to receive the comparator outputs, the controller being configured to: (i) signal the control inputs of a number V1 of the voltage generators, and estimate a number B1 of bits of the digital representation; and subsequently (ii) signal the control input(s) of a number V2 of the voltage generators, and estimate a number B2 of bits of the digital representation; wherein V2 is less than V1.

Abstract: A channel equalization and tracking apparatus and method and a receiver. The apparatus includes: a Fourier transforming unit configured to transform a received time-domain signal into a frequency-domain signal; a compensating and equalizing unit configured to perform phase compensation and frequency-domain equalization on the signal outputted by the Fourier transforming unit by using one time of multiplication according to time delay information and an equalizer coefficient; a deciding unit configured to decide the equalized signal; and a channel tracking unit configured to track a channel according to the signal outputted by the Fourier transforming unit and an error signal obtained by the deciding unit. With embodiments of the present disclosure, not only complexity and hardware demands of the whole system are lowered, but also performance of the system is not affected.

Abstract: An adaptive equalizer, an adaptive equalization method and receiver are disclosed where the adaptive equalizer is used for performing adaptive equalization processing on a frequency-domain signal, a channel used by the frequency-domain signal containing multiple subcarriers, the adaptive equalizer comprises: an equalizer coefficient generating unit configured to, for each subcarrier, generate an equalizer coefficient to which the subcarrier corresponds according to channel information and a step length of the subcarrier; where different subcarriers correspond to different step lengths and an equalization processing unit configured to, for each subcarrier, perform equalization processing on a signal in the subcarrier by using the equalizer coefficient.

Abstract: A channel equalization and tracking apparatus and method and a receiver. The apparatus includes: a Fourier transforming unit configured to transform a received time-domain signal into a frequency-domain signal; a compensating and equalizing unit configured to perform phase compensation and frequency-domain equalization on the signal outputted by the Fourier transforming unit by using one time of multiplication according to time delay information and an equalizer coefficient; a deciding unit configured to decide the equalized signal; and a channel tracking unit configured to track a channel according to the signal outputted by the Fourier transforming unit and an error signal obtained by the deciding unit. With embodiments of the present disclosure, not only complexity and hardware demands of the whole system are lowered, but also performance of the system is not affected.

Abstract: An adaptive equalizer, an adaptive equalization method and receiver are disclosed where the adaptive equalizer is used for performing adaptive equalization processing on a frequency-domain signal, a channel used by the frequency-domain signal containing multiple subcarriers, the adaptive equalizer comprises: an equalizer coefficient generating unit configured to, for each subcarrier, generate an equalizer coefficient to which the subcarrier corresponds according to channel information and a step length of the subcarrier; where different subcarriers correspond to different step lengths and an equalization processing unit configured to, for each subcarrier, perform equalization processing on a signal in the subcarrier by using the equalizer coefficient.

Abstract: A demodulation circuit, including: an input terminal (IN) inputting a current amplitude modulated signal; a first transistor (101) connected to the input terminal; a capacitance (105) connected to a control terminal of the first transistor; a diode (102) connected between the input terminal and the control terminal of the first transistor; and a first current source (104) applying a current of the input terminal, is provided.

Abstract: Widening the frequency range without increasing the power consumption. Current circuits output charge current based on control current. Capacitors are provided in association with the current circuits and store the charge current. Discharge transistors are provided in association with the capacitors and cause the capacitors to discharge electric charge. On-off transistors are connected between the current circuits and the capacitors and open or close the paths between the current circuits and the capacitors in accordance with the voltages across the capacitors. Signal output transistors have their gates connected between the current circuits and the on-off transistors and output signals to a flip-flop in accordance with the charge current. The flip-flop drives the discharge transistors alternately in accordance with the signals.

Abstract: A demodulation circuit, including: an input terminal (IN) inputting a current amplitude modulated signal; a first transistor (101) connected to the input terminal; a capacitance (105) connected to a control terminal of the first transistor; a diode (102) connected between the input terminal and the control terminal of the first transistor; and a first current source (104) applying a current of the input terminal, is provided.

Abstract: To be capable of receiving many data without increasing a transfer speed. A wave detector detects a radio signal RF received by an antenna. The radio signal RF received by the antenna has been subjected to ASK modulation, for example, and by getting it through a lowpass filter or the like, an envelope (multilevel signal) that is a basis of received data D0, D1 is obtained. An amplitude detector detects the maximum value and the minimum value of the amplitude of the multilevel signal. A threshold calculator calculates a plurality of thresholds to be used for determining whether the multilevel signal is H state or L state, from the maximum value and the minimum value detected by the amplitude detector. A multilevel restoration unit compares the multilevel signal with each of the thresholds to detect the H state and the L state, and reconstructs a plurality of received data D0 to Dn.

Abstract: Widening the frequency range without increasing the power consumption. Current circuits output charge current based on control current. Capacitors are provided in association with the current circuits and store the charge current. Discharge transistors are provided in association with the capacitors and cause the capacitors to discharge electric charge. On-off transistors are connected between the current circuits and the capacitors and open or close the paths between the current circuits and the capacitors in accordance with the voltages across the capacitors. Signal output transistors have their gates connected between the current circuits and the on-off transistors and output signals to a flip-flop in accordance with the charge current. The flip-flop drives the discharge transistors alternately in accordance with the signals.

Abstract: To be capable of receiving many data without increasing a transfer speed. A wave detector detects a radio signal RF received by an antenna. The radio signal RF received by the antenna has been subjected to ASK modulation, for example, and by getting it through a lowpass filter or the like, an envelope (multilevel signal) that is a basis of received data D0, D1 is obtained. An amplitude detector detects the maximum value and the minimum value of the amplitude of the multilevel signal. A threshold calculator calculates a plurality of thresholds to be used for determining whether the multilevel signal is H state or L state, from the maximum value and the minimum value detected by the amplitude detector. A multilevel restoration unit compares the multilevel signal with each of the thresholds to detect the H state and the L state, and reconstructs a plurality of received data D0 to Dn.

Abstract: An RFID tag device, which includes an analog/digital conversion circuit converting a size of a signal received via an antenna from an analog format to a digital format, and a transmission circuit transmitting the signal in digital format or the signal based on the signal in digital format via the antenna, is provided. Besides, an RFID reader/writer device, which includes a transmission circuit transmitting a signal via an antenna, and a conversion circuit receiving a signal representing a size of the transmitted signal via the antenna, and converting into distance information based on the received signal, is provided.

Abstract: A power supply circuit for supplying power to a load includes an antenna which receives electric power, a rectifier coupled to the antenna and configured to convert an alternating voltage supplied from the antenna into a direct-current voltage, a voltage step-down circuit which steps down the direct-current voltage to generate an output voltage for provision to the load, a regulator which controls a resistance connected between the output voltage and a ground voltage in parallel with the load, thereby controlling a voltage level of the output voltage.

Abstract: A power supply circuit for supplying power to a load includes an antenna which receives electric power, a rectifier coupled to the antenna and configured to convert an alternating voltage supplied from the antenna into a direct-current voltage, a voltage step-down circuit which steps down the direct-current voltage to generate an output voltage for provision to the load, a regulator which controls a resistance connected between the output voltage and a ground voltage in parallel with the load, thereby controlling a voltage level of the output voltage.