Patents by Inventor Andy Cheung

Andy Cheung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230026132
    Abstract: A method of creating a reinforced dental prosthesis is provided that can include providing a three-dimensional (3D) printed dental prosthesis, and applying a coating solution to at least a portion of an outer surface of the 3D printed dental prosthesis. The coating solution can include a polymerizable resin and filler particles distributed within the polymerizable resin. The method can include curing the coating solution on the 3D printed dental prosthesis to create the reinforced dental prosthesis.
    Type: Application
    Filed: July 20, 2022
    Publication date: January 26, 2023
    Inventors: Andy Cheung, Yoon H. Kang
  • Patent number: 10128715
    Abstract: An electric motor has a stator, a rotor rotatable with respect to the stator, motor windings, a connection plate electrically connected to the motor windings, and a power lead for connecting the motor to a power source. The power lead is connected to the connection plate by an electrical connection and by a separate mechanical connection. The mechanical connection protects the electrical connection from vibration or movement which may otherwise break the electrical connection.
    Type: Grant
    Filed: March 31, 2015
    Date of Patent: November 13, 2018
    Assignee: JOHNSON ELECTRIC S.A.
    Inventors: Hai Feng Shi, Yue Zou, James Ching Sik Lau, Yiu Wah Andy Cheung
  • Publication number: 20150280509
    Abstract: An electric motor has a stator, a rotor rotatable with respect to the stator, motor windings, a connection plate electrically connected to the motor windings, and a power lead for connecting the motor to a power source. The power lead is connected to the connection plate by an electrical connection and by a separate mechanical connection. The mechanical connection protects the electrical connection from vibration or movement which may otherwise break the electrical connection.
    Type: Application
    Filed: March 31, 2015
    Publication date: October 1, 2015
    Inventors: Hai Feng SHI, Yue ZOU, James Ching Sik LAU, Yiu Wah Andy CHEUNG
  • Patent number: 6914832
    Abstract: A semiconductor memory device includes a plurality of blocks, each of which includes a memory cell array, and outputs data signals and a redundancy signal. The semiconductor memory device further includes at least one first multiplexer which is coupled to the blocks, and selects one of the blocks, and a second multiplexer which performs redundancy processing based on the data signals and the redundancy signal which have undergone block selection by the first multiplexer.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: July 5, 2005
    Assignee: Fujitsu Limited
    Inventors: Andy Cheung, Yasushi Oka
  • Patent number: 6865133
    Abstract: A memory circuit has a plurality of blocks which further comprises a plurality of regular sectors and a spare sector, wherein each sector further comprises a plurality of memory cells, and when a regular sector in a first block is defective, this defective regular sector is replaced with a spare sector in a second block. And responding to an address to be supplied, the regular sector corresponding to the supplied address in the first block and the spare selector in the second block are selected simultaneously during a first period, and after the first period, selection of one of the regular sector and the spare sector is maintained according to the result of redundancy judgment on whether the supply address matches with the redundant address.
    Type: Grant
    Filed: September 2, 2003
    Date of Patent: March 8, 2005
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Tsukidate, Kazuhiro Kurihara, Yasushi Kasa, Tsutomu Nakai, Andy Cheung
  • Patent number: 6853596
    Abstract: A semiconductor memory includes a core array including a plurality of memory cells, and a redundant array to be substituted for a substitution object area having a defective cell in the core array. In this semiconductor memory, there are provided a substitution address memory which stores an address of a first substitution object area including both sides of the defective cell as a substitution object address, and a redundancy controller which controls to substitute the redundant array for the substitution object area of the core array. When a portion of the first substitution object area is located on the outside of the core array, the redundancy controller controls to substitute the redundant array for a second substitution object area which has the defective cell and is located on the inside of the core array.
    Type: Grant
    Filed: September 10, 2003
    Date of Patent: February 8, 2005
    Assignee: Fujitsu Limited
    Inventor: Andy Cheung
  • Publication number: 20040109371
    Abstract: A memory circuit has a plurality of blocks which further comprises a plurality of regular sectors and a spare sector, wherein each sector further comprises a plurality of memory cells, and when a regular sector in a first block is defective, this defective regular sector is replaced with a spare sector in a second block. And responding to an address to be supplied, the regular sector corresponding to the supplied address in the first block and the spare selector in the second block are selected simultaneously during a first period, and after the first period, selection of one of the regular sector and the spare sector is maintained according to the result of redundancy judgment on whether the supply address matches with the redundant address.
    Type: Application
    Filed: September 2, 2003
    Publication date: June 10, 2004
    Inventors: Yoshihiro Tsukidate, Kazuhiro Kurihara, Yasushi Kasa, Tsutomu Nakai, Andy Cheung
  • Publication number: 20040100833
    Abstract: A semiconductor memory includes a core array including a plurality of memory cells, and a redundant array to be substituted for a substitution object area having a defective cell in the core array. In this semiconductor memory, there are provided a substitution address memory which stores an address of a first substitution object area including both sides of the defective cell as a substitution object address, and a redundancy controller which controls to substitute the redundant array for the substitution object area of the core array. When a portion of the first substitution object area is located on the outside of the core array, the redundancy controller controls to substitute the redundant array for a second substitution object area which has the defective cell and is located on the inside of the core array.
    Type: Application
    Filed: September 10, 2003
    Publication date: May 27, 2004
    Inventor: Andy Cheung
  • Publication number: 20040085799
    Abstract: A semiconductor memory device includes a plurality of blocks, each of which includes a memory cell array, and outputs data signals and a redundancy signal. The semiconductor memory device further includes at least one first multiplexer which is coupled to the blocks, and selects one of the blocks, and a second multiplexer which performs redundancy processing based on the data signals and the redundancy signal which have undergone block selection by the first multiplexer.
    Type: Application
    Filed: September 2, 2003
    Publication date: May 6, 2004
    Inventors: Andy Cheung, Yasushi Oka