Abstract: A method and system of providing easy configuration of asset metadata for each type of asset in a Web-based asset management is disclosed. The method and system comprises of one XML schema file for each asset type defined in the system, one XSL asset creation process stylesheet file that can be used with any XML schema file, one XSL asset metadata layout stylesheet for each asset type defined in the system, a Web-based application that uses the XML schema file and XSL asset creation process stylesheet file to display a form for the user to enter the metadata for a new asset, and to validate the data entry against the schema, and a XML database to store XML asset attribute files (one for each unique asset). Additionally, the method and system makes it possible for viewable files be linked to an asset metadata field with a unique XML asset attribute file, such as to facilitate previewing.

Abstract: A video game cartridge that can be plugged into a video game machine to enable a user to request and play a video game for a predetermined number of video frames. The cartridge has a receiver for receiving the video game program and the predetermined frame count in response to a request from the user. The program and frame count is then stored in a memory of the cartridge. Finally, the cartridge has a counter which changes its value when the user is actively playing the video game program. The counter ceases to change its value when the user is not playing the video game program. When the counter reaches a predetermined limit, the user is no longer authorized to play the video game program.

Abstract: The present invention provides an integrated display system for multi-media workstations wherein graphics image and video data are merged in a single frame buffer. The integrated display system employs 3-port VRAMs with a first serial access port for display data output, and a random access port for graphics data, a second serial access for video data input. The display system includes a single frame buffer memory system for a multi-media workstation which operates compatibly with display systems and logic designed for dual frame buffer systems and it uses the 3-port VRAM in combination with a means incorporating improved input locking, video update or refresh, and encoded video data input stream.

Abstract: A sequential process-pipeline (12) has a first processing stage (30) coupled to a CODEC (24) through a plurality of buffers, including an image data input buffer (28), an image data output buffer (26), and an address buffer (34). The address buffer stores addresses, each of which identifies an initial address of a block of addresses within an image memory (22). Each block of addresses in the image memory stores a block of decompressed image data. A local controller (18) is responsive to the writing of an address into the address buffer to initiate the operation of the CODEC to execute a Discrete Cosine Transformation Process and a Discrete Cosine Transformation Quantization Process.