Abstract: A system and method for forecasting power consumption at a facility, the facility having a system of compute units for executing jobs of computing. The forecast of power includes forecasting sequence of jobs execution on a system of the nodes over time, estimating power for the jobs of the system, and developing a system-level power forecast.

Abstract: A system and method for computing at a facility having systems of multiple compute nodes to execute jobs of computing. Power consumption of the facility is managed to within a power band. The power consumption may be adjusted by implementing (e.g., by a power balloon) activities having little or no computational output.

Abstract: A system and method for computing including compute units to execute a computing event, the computing event being a server application or a distributed computing job. A power characteristic or a thermal characteristic, or a combination thereof, of the compute units is determine. One or more of the compute units is selected to execute the computing event based on a selection criterion and on the characteristic.

Abstract: A system and method for distributed computing, including executing a job of distributed computing on compute nodes. The speed of parallel tasks of the job executing on the compute nodes are adjusted to increase performance of the job or to lower power consumption of the job, or both, wherein the adjusting is based on imbalances of respective speeds of the parallel tasks.

Abstract: A process identifier for a job is collected. The job runs on a plurality of nodes. The job is identified using the process identifier. A node for the job is identified. An amount of power consumed by the node to run the job is determined.

Abstract: An indication of a mode for a job is received. An available power for the job is determined based on the mode. A first power for the job is allocated based on the available power. A first frequency for the job is determined based on the available power. The first power is adjusted based on the available power.

Abstract: A method of managing power and performance of a High-performance computing (HPC) systems, including: determining a power budget for a HPC system, wherein the HPC system includes a plurality of interconnected HPC nodes operable to execute a job, determining a power and cooling capacity of the HPC system, allocating the power budget to the job to maintain a power consumption of the HPC system within the power budget and the power and cooling capacity of the HPC system, and executing the job on selected HPC nodes is shown.

Abstract: A non-transitory computer readable storage medium storing instructions executable by one or more processors of a distributed computer system to perform operations including determining whether a power consumed by the distributed computer system is greater than a power allocated to the distributed computer system, responsive to determining the power consumed by the distributed computer system is greater than the power allocated to the distributed computer system, determining whether all jobs being processed by the distributed computer system are processing at a lowest power state for each job, wherein a job includes one or more calculations performed by the one or more processors of the distributed computer system and responsive to determining all jobs being processed by the distributed computer system are processing at a lowest power state for each job, suspending a job having a lowest priority among all jobs being processed by the distributed computer system is shown.

Abstract: A non-transitory computer readable storage medium having stored thereon instructions executable by one or more processors to perform operations including: receiving a plurality of input parameters including (i) a workload type, (ii) a list of selected nodes belonging to a distributed computer system, and (iii) a list of frequencies; responsive to receiving the plurality of workload parameters, retrieving calibration data from a calibration database; generating a power estimate based on the plurality of workload parameters and the calibration data; and providing the power estimate to a resource manager is shown. Alternatively, the input parameters may include (i) a workload type, (ii) a list of selected nodes belonging to a distributed computer system, and (iii) an amount of available power, wherein the estimator may provide an estimation of the frequency at which the nodes should operate to utilize as much of the available power without exceeding the available power.

Abstract: A non-transitory computer readable storage medium having stored thereon instructions, the instructions being executable by one or more processors to perform operations including: receiving, by a calibration module executed by the one or more processors, a calibration request including (i) a workload type, (ii) a list of compute nodes belonging to a distributed computer system, and (iii) one or more frequencies; responsive to identifying the workload type as a clustered workload type, instructing a plurality of compute nodes on the list of compute nodes to begin processing a workload of the workload type; and responsive to identifying the workload type as a clustered workload type, instructing a compute node on the list of compute nodes to begin processing the workload of the workload type is shown.

Abstract: Mechanisms for exposing a protected memory address are provided. A processing device may store a data value at a protected memory address. The protected memory address may be a control register or a status register. The processing device may identify a mirror relationship between the protected memory address and an unprotected memory address and copy the data value from the protected memory address to the unprotected memory address. The unprotected memory address may be directly accessible via an external interface.

Abstract: Mechanisms for exposing a protected memory address are provided. A processing device may store a data value at a protected memory address. The protected memory address may be a control register or a status register. The processing device may identify a mirror relationship between the protected memory address and an unprotected memory address and copy the data value from the protected memory address to the unprotected memory address. The unprotected memory address may be directly accessible via an external interface.