Patents by Inventor Andy Perkins

Andy Perkins has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10685882
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Grant
    Filed: May 23, 2017
    Date of Patent: June 16, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Dave Pratt, Andy Perkins
  • Publication number: 20170256452
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Application
    Filed: May 23, 2017
    Publication date: September 7, 2017
    Applicant: Micron Technology, Inc.
    Inventors: Dave Pratt, Andy Perkins
  • Patent number: 9685375
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Grant
    Filed: December 5, 2014
    Date of Patent: June 20, 2017
    Assignee: Micron Technology, Inc.
    Inventors: Dave Pratt, Andy Perkins
  • Publication number: 20150087147
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Application
    Filed: December 5, 2014
    Publication date: March 26, 2015
    Inventors: Dave Pratt, Andy Perkins
  • Patent number: 8927410
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Grant
    Filed: December 9, 2013
    Date of Patent: January 6, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Dave Pratt, Andy Perkins
  • Publication number: 20140099786
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Application
    Filed: December 9, 2013
    Publication date: April 10, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Dave Pratt, Andy Perkins
  • Patent number: 8680634
    Abstract: Method and apparatus providing a wafer level fabrication of imager modules in which a permanent carrier protects imager devices on an imager wafer and is used to support a lens wafer.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: March 25, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Swarnal Borthakur, Rick Lake, Andy Perkins, Scott Churchwell, Steve Oliver
  • Patent number: 8629060
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Grant
    Filed: September 29, 2011
    Date of Patent: January 14, 2014
    Assignee: Micron Technology, Inc.
    Inventors: Dave Pratt, Andy Perkins
  • Publication number: 20120021601
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Application
    Filed: September 29, 2011
    Publication date: January 26, 2012
    Applicant: MICRON TECHNOLOGY, INC.
    Inventors: Dave Pratt, Andy Perkins
  • Patent number: 8048708
    Abstract: Method and apparatus providing a wafer level fabrication of imager modules in which a permanent carrier protects imager devices on an imager wafer and is used to support a lens wafer.
    Type: Grant
    Filed: June 25, 2008
    Date of Patent: November 1, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Swarnal Borthakur, Rick Lake, Andy Perkins, Scott Churchwell, Steve Oliver
  • Patent number: 8034702
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Grant
    Filed: August 16, 2007
    Date of Patent: October 11, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Dave Pratt, Andy Perkins
  • Publication number: 20110204462
    Abstract: Method and apparatus providing a wafer level fabrication of imager modules in which a permanent carrier protects imager devices on an imager wafer and is used to support a lens wafer.
    Type: Application
    Filed: April 29, 2011
    Publication date: August 25, 2011
    Inventors: Swarnal Borthakur, Rick Lake, Andy Perkins, Scott Churchwell, Steve Oliver
  • Patent number: 7989266
    Abstract: A wafer of integrated circuits may be bonded to a carrier wafer using a layer of bonding material. The thickness of the wafer of integrated circuits may then be reduced using a series of grinding operations. After grinding, backside processing operations may be performed to form scribe channels that separate the die from each other and to form through-wafer vias. The scribe channels may be formed by dry etching and may have rectangular shapes, circular shapes, or other shapes. A pick and place tool may have a heated head. The bonding layer material may be based on a thermoplastic or other material that can be released by application of heat by the heated head of the pick and place tool. The pick and place tool may individually debond each of the integrated circuits from the carrier wafer and may mount the debonded circuits in packages.
    Type: Grant
    Filed: June 18, 2009
    Date of Patent: August 2, 2011
    Assignee: Aptina Imaging Corporation
    Inventors: Swarnal Borthakur, Andy Perkins, Rick Lake, Marc Sulfridge
  • Publication number: 20100323469
    Abstract: A wafer of integrated circuits may be bonded to a carrier wafer using a layer of bonding material. The thickness of the wafer of integrated circuits may then be reduced using a series of grinding operations. After grinding, backside processing operations may be performed to form scribe channels that separate the die from each other and to form through-wafer vias. The scribe channels may be formed by dry etching and may have rectangular shapes, circular shapes, or other shapes. A pick and place tool may have a heated head. The bonding layer material may be based on a thermoplastic or other material that can be released by application of heat by the heated head of the pick and place tool. The pick and place tool may individually debond each of the integrated circuits from the carrier wafer and may mount the debonded circuits in packages.
    Type: Application
    Filed: June 18, 2009
    Publication date: December 23, 2010
    Inventors: Swarnal Borthakur, Andy Perkins, Rick Lake, Marc Sulfridge
  • Publication number: 20090321863
    Abstract: Method and apparatus providing a wafer level fabrication of imager modules in which a permanent carrier protects imager devices on an imager wafer and is used to support a lens wafer.
    Type: Application
    Filed: June 25, 2008
    Publication date: December 31, 2009
    Inventors: Swarnal Borthakur, Rick Lake, Andy Perkins, Scott Churchwell, Steve Oliver
  • Publication number: 20090047781
    Abstract: A method of forming a through substrate interconnect includes forming a via into a semiconductor substrate. The via extends into semiconductive material of the substrate. A liquid dielectric is applied to line at least an elevationally outermost portion of sidewalls of the via relative a side of the substrate from which the via was initially formed. The liquid dielectric is solidified within the via. Conductive material is formed within the via over the solidified dielectric and a through substrate interconnect is formed with the conductive material.
    Type: Application
    Filed: August 16, 2007
    Publication date: February 19, 2009
    Inventors: Dave Pratt, Andy Perkins