Abstract: A self-aligned method for manufacturing an electrically alterable memory device on a semiconductor layer includes (a) forming an insulating layer on the semiconductor layer, (b) depositing a first conductive layer on the insulating layer, (c) forming trench isolation regions along and into the semiconductor layer, (d) depositing a sacrificial material on the first conductive layer, (e) etching the sacrificial material to form isolation channels, (f) forming two gate masks along lateral sides of the sacrificial material, (g) etching the first conductive layer to extend the channels to the insulating layer, (h) etching the sacrificial material to form a control channel, (i) etching the block of the first conductive layer, and (j) filling the control channel with a second conductive layer.