Abstract: System and method for implementing a VM APC platform are described. In one embodiment, the VM APC system comprises a process tool for processing a plurality of wafers, a metrology tool for measuring a sample wafer of the plurality of wafers and generating actual metrology data therefor, and a VM model for predicting metrology data for each of the plurality of wafers. The actual metrology data is received from the metrology tool and used to update the VM model. Key variables of the virtual metrology model are updated only in response to a determination that the VM model is inaccurate and parameters of the VM model are updated responsive to receipt of the actual metrology data for the sample wafer of the plurality of wafers. The system also includes an APC controller for receiving the predicted metrology data and the actual metrology data and controlling an operation of the process tool based on the received data.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes collecting a plurality of manufacturing data sets from a plurality of semiconductor processes, respectively. The method includes normalizing each of the manufacturing data sets in a manner so that statistical differences among the manufacturing data sets are reduced. The method includes establishing a database that includes the normalized manufacturing data sets. The method includes normalizing the database in a manner so that the manufacturing data sets in the normalized database are statistically compatible with a selected one of the manufacturing data sets. The method includes predicting performance of a selected one of the semiconductor processes by using the normalized database. The selected semiconductor process corresponds to the selected manufacturing data set. The method includes controlling a semiconductor processing machine in response to the predicted performance.

Abstract: System and method for implementing multi-resolution advanced process control (“APC”) are described. One embodiment is a method including obtaining low resolution metrology data and high resolution metrology data related to a process module for performing a process on the wafer. A process variable of the process is modeled as a function of the low resolution metrology data to generate a low-resolution process model and the process variable is modeled as a function of the high resolution metrology data to generate a high-resolution process model.

Abstract: The present disclosure provides a semiconductor manufacturing method. The method includes performing a first process to a first plurality of semiconductor wafers; determining a sampling rate to the first plurality of semiconductor wafers based on process quality; determining sampling fields and sampling points to the first plurality of semiconductor wafers; measuring a subset of the first plurality of semiconductor wafers according to the sampling rate, the sampling fields and the sampling points; modifying a second process according to the measuring; and applying the second process to a second plurality of semiconductor wafers.

Abstract: The present disclosure provides a semiconductor manufacturing method. The method includes providing product data of a product, the product data including a sensitive product parameter; searching existing products according to the sensitive product parameter to identify a relevant product from the existing products; determining an initial value of a processing model parameter to the product using corresponding data of the relevant product; assigning the initial value of the processing model parameter to a processing model associated with a manufacturing process; thereafter, tuning a processing recipe using the processing model; and performing the manufacturing process to a semiconductor wafer using the processing recipe.

Abstract: A method of advanced process control (APC) for semiconductor fabrication is provided. The method includes providing a present wafer to be processed by a semiconductor processing tool, providing first data of previous wafers that have been processed by the semiconductor processing tool, decoupling noise from the first data to generate second data, evaluating an APC performance based on proximity of the second data to a target data, determining a control parameter based on the APC performance, and controlling the semiconductor processing tool with the control parameter to process the present wafer.

Abstract: A method includes: initializing first and second variables; operating equipment based on the variables; measuring first and second parameters; determining a new value for the first variable based on the first parameter, and calculating a new value for the second variable based on the second parameter and the current value of the second variable; and repeating the operating, measuring, determining and calculating. According to a different aspect, an apparatus includes a computer-readable medium storing a computer program. When executed, the program causes: initializing of first and second variables; operating equipment based on the variables; receiving measured first and second parameters; determining a new value for the first variable based on the first parameter, and calculating a new value for the second variable based on the second parameter and the current value of the second variable; and repeating the operating, measuring, determining and calculating.

Abstract: System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing an inter-metal (“IM”) WAT on a plurality of processed wafer lots; selecting a subset of the plurality of wafer lots using a lot sampling process; and selecting a sample wafer group using the wafer lot subset, wherein IM WAT is performed on wafers of the sample wafer group to obtain IM WAT data therefore. The method further comprises estimating final WAT data for all wafers in the processed wafer lots from IM WAT data obtained for the sample wafer group and providing the estimated final WAT data to a WAT APC process for controlling processes.

Abstract: System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing a key process on a sample number of wafers of a lot of wafers; performing a key inline measurement related to the key process to produce metrology data for the wafers; predicting WAT data from the metrology data using an inline-to-WAT model; and using the predicted WAT data to tune a WAT APC process for controlling a tuning process or a process APC process.

Abstract: A method for providing a bin ratio forecast at an early stage of integrated circuit device manufacturing processes is disclosed. The method comprises collecting historical data from one or more processed wafer lots; collect measurement data from one or more skew wafer lots; generating an estimated baseline distribution from the collected historical data and collected measurement data; generating an estimated performance distribution based on one or more specified parameters and the generated estimated baseline distribution; determining a bin ratio forecast by applying a bin definition and a yield degradation factor estimation to the generated estimated performance distribution; determining one or more production targets based on the bin ratio forecast; and processing one or more wafers based on the one or more determined production targets.

Abstract: A method for providing bin-based control when manufacturing integrated circuit devices is disclosed. The method comprises performing a plurality of processes on a plurality of wafer lots; determining a required bin quantity, an actual bin quantity, and a projected bin quantity; comparing the determined required bin quantity with the determined actual bin quantity and determined projected bin quantity; and modifying at least one of the plurality of processes on the plurality of wafer lots if the determined actual bin quantity and determined projected bin quantity fail to satisfy the determined required bin quantity.

Abstract: The present disclosure provides a method of fabricating a semiconductor device. The method includes collecting a plurality of manufacturing data sets from a plurality of semiconductor processes, respectively. The method includes normalizing each of the manufacturing data sets in a manner so that statistical differences among the manufacturing data sets are reduced. The method includes establishing a database that includes the normalized manufacturing data sets. The method includes normalizing the database in a manner so that the manufacturing data sets in the normalized database are statistically compatible with a selected one of the manufacturing data sets. The method includes predicting performance of a selected one of the semiconductor processes by using the normalized database. The selected semiconductor process corresponds to the selected manufacturing data set. The method includes controlling a semiconductor processing machine in response to the predicted performance.

Abstract: System and method for implementing multi-resolution advanced process control (“APC”) are described. One embodiment is a method comprising obtaining low resolution metrology data and high resolution metrology data related to a process module for performing a process on the wafer; modeling a process variable of the process as a function of the low resolution metrology data to generate a low-resolution process model; and modeling the process variable as a function of the high resolution metrology data to generate a high-resolution process model.

Abstract: One embodiment is a method for fabricating ICs from a semiconductor wafer. The method includes performing a first process on the semiconductor wafer; taking a first measurement indicative of an accuracy with which the first process was performed; and using the first measurement to generate metrology calibration data, wherein the metrology calibration data includes an effective portion and a non-effective portion. The method further includes removing the non-effective portion from the metrology calibration data and modeling the effective portion with a metrology calibration model; combining the metrology calibration model with a first process model to generate a multi-resolution model, wherein the first process model models an input-output relationship of the first process; and analyzing a response of the multi-resolution model and second measurement data to control performance a second process.

Abstract: The present disclosure provides a semiconductor manufacturing method. The method includes providing product data of a product, the product data including a sensitive product parameter; searching existing products according to the sensitive product parameter to identify a relevant product from the existing products; determining an initial value of a processing model parameter to the product using corresponding data of the relevant product; assigning the initial value of the processing model parameter to a processing model associated with a manufacturing process; thereafter, tuning a processing recipe using the processing model; and performing the manufacturing process to a semiconductor wafer using the processing recipe.

Abstract: A method for providing a bin ratio forecast at an early stage of integrated circuit device manufacturing processes is disclosed. The method comprises collecting historical data from one or more processed wafer lots; collect measurement data from one or more skew wafer lots; generating an estimated baseline distribution from the collected historical data and collected measurement data; generating an estimated performance distribution based on one or more specified parameters and the generated estimated baseline distribution; determining a bin ratio forecast by applying a bin definition and a yield degradation factor estimation to the generated estimated performance distribution; determining one or more production targets based on the bin ratio forecast; and processing one or more wafers based on the one or more determined production targets.

Abstract: System and method for implementing a VM APC platform are described. In one embodiment, the VM APC system comprises a process tool for processing a plurality of wafers, a metrology tool for measuring a sample wafer of the plurality of wafers and generating actual metrology data therefor, and a VM model for predicting metrology data for each of the plurality of wafers. The actual metrology data is received from the metrology tool and used to update the VM model. Key variables of the virtual metrology model are updated only in response to a determination that the VM model is inaccurate and parameters of the VM model are updated responsive to receipt of the actual metrology data for the sample wafer of the plurality of wafers.

Abstract: System and method for implementing wafer acceptance test (“WAT”) advanced process control (“APC”) are described. In one embodiment, the method comprises performing a key process on a sample number of wafers of a lot of wafers; performing a key inline measurement related to the key process to produce metrology data for the wafers; predicting WAT data from the metrology data using an inline-to-WAT model; and using the predicted WAT data to tune a WAT APC process for controlling a tuning process or a process APC process.

Abstract: A method for providing bin-based control when manufacturing integrated circuit devices is disclosed. The method comprises performing a plurality of processes on a plurality of wafer lots; determining a required bin quantity, an actual bin quantity, and a projected bin quantity; comparing the determined required bin quantity with the determined actual bin quantity and determined projected bin quantity; and modifying at least one of the plurality of processes on the plurality of wafer lots if the determined actual bin quantity and determined projected bin quantity fail to satisfy the determined required bin quantity.

Abstract: System and method for implementing multi-resolution advanced process control (“APC”) are described. One embodiment is a method for fabricating ICs from a semiconductor wafer comprising performing a first process on the semiconductor wafer; taking a first measurement indicative of an accuracy with which the first process was performed; and using the first measurement to generate metrology calibration data, wherein the metrology calibration data includes an effective portion and a non-effective portion. The method further comprises removing the non-effective portion from the metrology calibration data and modeling the effective portion with a metrology calibration model; combining the metrology calibration model with a first process model to generate a multi-resolution model, wherein the first process model models an input-output relationship of the first process; and analyzing a response of the multi-resolution model and second measurement data to control performance a second process.