Abstract: A technique for reducing the number of layers in a multilayer circuit board having a plurality of electrically conductive signal layers for routing electrical signals to and from a surface of the multilayer circuit board is disclosed. The technique is realized by a method comprising: forming a plurality of electrically conductive vias in the multilayer circuit board extending from the surface of the multilayer circuit board to at least one of the plurality of electrically conductive signal layers; arranging the surface such that a first set of two power/ground pins corresponds to a first via and a second set of two power/ground pins corresponds to a second via positioned adjacent the first via, thereby creating a channel; and routing a first plurality of electrical signals through the channel on the first of the plurality of electrically conductive signal layers.

Abstract: A technique for facilitating circuitry design by providing minimum technology to minimize power consumption is disclosed. In one embodiment, the technique is realized by providing a system comprising estimation tools including power/density estimation tools, subsystem performance estimation tools, and performance analysis tools. Based on components and goals input by the user the system provides comparisons to facilitate minimum power consumption, maximum density, and maximum throughput. The user proceeds from a component level to a system level to arrive at an optimal system design.