Abstract: Based on a phase lock loop structure, having a reference signal generator (1), a first phase detector (2), a low pass filter (3), a VCO (4) and a frequency divider (5), in order to achieve a faster channel switching an maintain the design of the filters to be as simple as possible, a second phase detector (6) is provided that receives the reference signal (9) and a second output signal (11) coming from the frequency divider (5) and shifted 90.degree. with respect to its other output signal (10), and that generates a second phase error signal (13), in quadrature with the first phase error signal (12), that is filtered by a second low pass filter (7) thereby generating a second filtered phase error signal (15). The two filtered phase error signals (14,15) are provided to a quadratic correlator (8) whose output is provided to the VCO (4). Its amplitude is proportional to the difference of frequencies between the reference signal (9) and any of the output signals (10,11) from the frequency divider (5).