Abstract: Techniques are disclosed for providing class-specific parameters for spinlocks in an application executing in a runtime environment. During execution of the application, a blocking portion of code is entered for an object in the application. The runtime environment determines that one or more spinlock parameters is enabled for the object of a class. The runtime environment applies the determined spinlock parameters to the object. A spinlock algorithm is performed using the applied spinlock parameters.

Abstract: Systems and methods for computer memory management by a memory coordinator and a plurality of memory consumers. An urgency and memory quota of each memory consumer is initialized by the memory coordinator, which then adjusts the memory quota of each memory consumer such that the sum of the memory quota of each memory consumer does not exceed a finite amount of computer memory. Each memory consumer adjusts its memory usage in response to the quota input and urgency input from the memory coordinator.

Abstract: A system for memory management that comprises: a computing system having a finite amount of memory and a physical computer readable storage memory readable by a processing circuit and storing instructions for execution by the circuit to: set, by a memory coordinator, the urgency of each memory consumer; adjust, by the memory coordinator, the memory quota of each memory consumer—such that the sum of the memory quota of each memory consumer does not exceed the memory; and adjust, by each memory consumer, its memory usage in response to a quota input and an urgency input from the memory coordinator to the memory consumer. The memory is managed by a memory coordinator and memory consumers; and consumed by the memory consumers. Each memory consumer has: a memory quota, an urgency and a memory usage. Also, the urgency of each memory consumer increases as the sum of the memory usage of the plurality of memory consumers approaches the finite amount of memory.

Abstract: A method to determine if a value is present in a storage hierarchy which comprises initialization of a range of the collection that resides on a first storage device that is in a tier slower than a fastest tier of a storage hierarchy; partitioning the range into disjointed range partitions such that a first subset of the range partitions is designated as cached and a second subset is designated as uncached; partitioning the collection into a subset of uncached data and cached data; copying, the subset of the collection which lies in the one or more cached range partitions into a cache, wherein the cache resides on a second storage device that is in a tier faster than the first storage device; determination of a target range partition to which the value belongs, and determining if the target range partition is cached or uncached.

Abstract: Aspects provide multi-tier data synchronization based on a concurrent linked monitor list. A computer processor associates each of different data regions of a packed data object with different mutual exclusion monitor nodes of a linked list, the data regions defined by a data offset location within memory data and a length of the data region from the offset. In response to determining that a first data region of the packed data object is on-heap memory, the processor associates the first data region with a container representative of the linked list sorted in ascending order of the respective offset values, and a hash code of the container; and in response to determining that a second data region of the packed data object is off-heap memory, stores container information for the second data region in the linked list and resorts the linked-list nodes of container information in ascending order of offset values.

Abstract: Aspects provide multi-tier data synchronization based on a concurrent linked monitor list. A computer processor associates each of different data regions of a packed data object with different mutual exclusion monitor nodes of a linked list, the data regions defined by a data offset location within memory data and a length of the data region from the offset. In response to determining that a first data region of the packed data object is on-heap memory, the processor associates the first data region with a container representative of the linked list sorted in ascending order of the respective offset values, and a hash code of the container; and in response to determining that a second data region of the packed data object is off-heap memory, stores container information for the second data region in the linked list and resorts the linked-list nodes of container information in ascending order of offset values.

Abstract: Aspects provide multi-tier data synchronization based on a concurrent linked monitor list. A computer processor associates each of different data regions of a packed data object with different mutual exclusion monitor nodes of a linked list, the data regions defined by a data offset location within memory data and a length of the data region from the offset. In response to determining that a first data region of the packed data object is on-heap memory, the processor associates the first data region with a container representative of the linked list sorted in ascending order of the respective offset values, and a hash code of the container; and in response to determining that a second data region of the packed data object is off-heap memory, stores container information for the second data region in the linked list and resorts the linked-list nodes of container information in ascending order of offset values.

Abstract: A method, system and computer program product for sharing class data among virtual machine applications running on one or more guests in a virtualized environment. A control program in a virtual operating system is used to manage the user portions of the virtual operating system, each commonly referred to as a guest. A guest operating system runs on each guest and applications can run on each guest operating system. A memory management facility manages shared memory which includes a class cache configured to store class data. The shared memory may be mounted onto each guest using a cluster file system or accessed via an API interface thereby allowing the class cache to be shared across the guests. By sharing the class cache among the guests, multiple copies of the same class data are no longer necessary thereby optimally using the physical memory on the host.

Abstract: Aspects provide multi-tier data synchronization based on a concurrent linked monitor list. A computer processor associates each of different data regions of a packed data object with different mutual exclusion monitor nodes of a linked list, the data regions defined by a data offset location within memory data and a length of the data region from the offset. In response to determining that a first data region of the packed data object is on-heap memory, the processor associates the first data region with a container representative of the linked list sorted in ascending order of the respective offset values, and a hash code of the container; and in response to determining that a second data region of the packed data object is off-heap memory, stores container information for the second data region in the linked list and resorts the linked-list nodes of container information in ascending order of offset values.

Abstract: Techniques are disclosed for providing class-specific parameters for spinlocks in an application executing in a runtime environment. During execution of the application, a blocking portion of code is entered for an object in the application. The runtime environment determines that one or more spinlock parameters is enabled for the object of a class. The runtime environment applies the determined spinlock parameters to the object. A spinlock algorithm is performed using the applied spinlock parameters.

Abstract: The present invention relates generally to computer graphics, and more specifically to methods of, and systems for, configuring, controlling and accessing multiple hardware graphics layers that are used to compose a single video display. One aspect of the invention is broadly defined as follows: in a computer environment including a software application and an operating system running on a computer, the computer including a graphics card and a video display, the graphics card being operable to render images to the video display. The operating system is operable to: receive draw events; and respond to draw requests from the software application by rendering the draw requests selectively to any of the available hardware layers on the graphics card; whereby the computer environment allows software applications to exploit available hardware layers on the graphics card.

Abstract: A method for creating an enhanced array is provided. An enhanced compiler generates an instrumented class file for an enhanced array class. The enhanced array class comprises at least one element class. The enhanced runtime loads the instrumented class file of the enhanced array class. The enhanced runtime loads a class file corresponding to the element class of the enhanced array class, and builds an internal data structure corresponding to the enhanced array class. An amount of memory storage is calculated for storing the enhanced array instance, and the amount of memory storage is allocated.

Abstract: A method for creating an enhanced array is provided. An enhanced compiler generates an instrumented class file for an enhanced array class. The enhanced array class comprises at least one element class. The enhanced runtime loads the instrumented class file of the enhanced array class. The enhanced runtime loads a class file corresponding to the element class of the enhanced array class, and builds an internal data structure corresponding to the enhanced array class. An amount of memory storage is calculated for storing the enhanced array instance, and the amount of memory storage is allocated.

Abstract: A method for creating an enhanced array is provided. An enhanced compiler generates an instrumented class file for an enhanced array class. The enhanced array class comprises at least one element class. The enhanced runtime loads the instrumented class file of the enhanced array class. The enhanced runtime loads a class file corresponding to the element class of the enhanced array class, and builds an internal data structure corresponding to the enhanced array class. An amount of memory storage is calculated for storing the enhanced array instance, and the amount of memory storage is allocated.

Abstract: A method for creating an enhanced array is provided. An enhanced compiler generates an instrumented class file for an enhanced array class. The enhanced array class comprises at least one element class. The enhanced runtime loads the instrumented class file of the enhanced array class. The enhanced runtime loads a class file corresponding to the element class of the enhanced array class, and builds an internal data structure corresponding to the enhanced array class. An amount of memory storage is calculated for storing the enhanced array instance, and the amount of memory storage is allocated.

Abstract: The present invention relates generally to computer graphics, and more specifically to methods of, and systems for, configuring, controlling and accessing multiple hardware graphics layers that are used to compose a single video display. One aspect of the invention is broadly defined as follows: in a computer environment including a software application and an operating system running on a computer, the computer including a graphics card and a video display, the graphics card being operable to render images to the video display. The operating system is operable to: receive draw events; and respond to draw requests from the software application by rendering the draw requests selectively to any of the available hardware layers on the graphics card; whereby the computer environment allows software applications to exploit available hardware layers on the graphics card.

Abstract: The present invention relates generally to computer graphics, and more specifically to methods of, and systems for, configuring, controlling and accessing multiple hardware graphics layers that are used to compose a single video display.

Abstract: A software application and an operating system may run on a computer, which includes a graphics card and a video display, where the graphics card is operable to render images to the video display, and the operating system includes a universal application programming interface (API) which supports hardware layers on graphics cards. The operating system may be operable to receive draw events via the universal API; determine what hardware layers are available on the graphics card, and what their parameters are; and respond to draw requests from the software application by rendering the draw requests selectively to any of the available hardware layers on the graphics card.

Abstract: Shared memory and sockets are used to protect shared resources where multiple operating systems execute concurrently on the same hardware. Rather than using spinlocks for serializing access, when a thread is unable to acquire a shared resource because that resource is already held by another thread, the thread creates a socket with which it will wait to be notified that the shared resource has been released. The sockets may be network sockets or in-memory sockets that are accessible across the multiple operating systems; if sockets are not available, communication technology that provides analogous services between operating systems may be used instead. Optionally, fault tolerance is provided to address socket failures, in which case one or more threads may fall back (at least temporarily) to using spinlocks. A locking service may execute on each operating system to provide a programming interface through which threads can invoke lock operations.

Abstract: A software application and an operating system may run on a computer, which includes a graphics card and a video display, where the graphics card is operable to render images to the video display, and the operating system includes a universal application programming interface (API) which supports hardware layers on graphics cards. The operating system may be operable to receive draw events via the universal API; determine what hardware layers are available on the graphics card, and what their parameters are; and respond to draw requests from the software application by rendering the draw requests selectively to any of the available hardware layers on the graphics card.