Patents by Inventor Angela S. Parekh

Angela S. Parekh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230386970
    Abstract: Semiconductor devices having nano through substrate vias (TSVs), and related systems and methods, are disclosed herein. In some embodiments, the semiconductor device includes a semiconductor substrate that has a first surface and a second surface opposite the first surface. A trench is formed in the first surface and filled with a dielectric material and a TSV extends from the first surface to the second surface within the footprint of the trench. In some embodiments, the TSV includes a conductive material that includes a first portion and a second portion. The first portion includes a first end at the first surfacer and a second end with a larger cross-sectional area than the first end. Similarly, the second portion includes a third end coupled to the second end and a fourth end at the second surface with a larger cross-sectional area than the third end.
    Type: Application
    Filed: May 27, 2022
    Publication date: November 30, 2023
    Inventors: Kunal R. Parekh, Angela S. Parekh
  • Patent number: 11817126
    Abstract: Methods and devices related to converting sign language are described. In an example, a method can include receiving, at a processing resource of a computing device via a radio of the computing device, first signaling including at least one of text data, audio data, or video data, or any combination thereof, converting, at the processing resource, at least one of the text data, the audio data, or the video data to data representing a sign language, generating, at the processing resource, different video data based at least in part on the data representing the sign language, wherein the different video data comprises instructions for display of a performance of the sign language, transmitting second signaling representing the different video data from the processing resource to a user interface, and displaying the performance of the sign language on the user interface in response to the user interface receiving the second signaling.
    Type: Grant
    Filed: April 20, 2021
    Date of Patent: November 14, 2023
    Assignee: Micron Technology, Inc.
    Inventors: Ariela E. Gruszka, Angela S. Parekh, Mandy W. Fortunati, Teresa M. Di Dio
  • Publication number: 20230136202
    Abstract: A semiconductor device assembly is provided. The assembly includes a first semiconductor device including a plurality of electrical contacts on an upper surface thereof; a monolithic silicon structure having a lower surface in contact with the upper surface of the first semiconductor device, the monolithic silicon structure including a cavity extending from the lower surface completely through a body of the monolithic silicon structure to a top surface of the monolithic silicon structure; and a second semiconductor device disposed in the cavity, the second semiconductor device including a plurality of interconnects, each operatively coupled to a corresponding one of the plurality of electrical contacts.
    Type: Application
    Filed: April 13, 2022
    Publication date: May 4, 2023
    Inventors: Kunal R. Parekh, Angela S. Parekh
  • Publication number: 20230110367
    Abstract: A method of forming a microelectronic device comprises forming a first microelectronic device structure comprising a preliminary stack structure comprising sacrificial structures and insulative structures vertically alternating with the sacrificial structures. A second microelectronic device structure comprising control logic circuitry is formed. The first microelectronic device structure is attached to the second microelectronic device structure to form an assembly. After forming the assembly, the sacrificial structures are at least partially replaced with conductive structures to form a stack structure. Contact structures are formed to extend through the stack structure. One or more of the contact structures are coupled to the control logic circuitry. Conductive line structures are formed over the stack structure. One or more of the conductive line structures are coupled to the one or more of the contact structures. Microelectronic devices, memory devices, and electronic systems are also described.
    Type: Application
    Filed: October 13, 2021
    Publication date: April 13, 2023
    Inventors: Kunal R. Parekh, Angela S. Parekh
  • Publication number: 20220335971
    Abstract: Methods and devices related to converting sign language are described. In an example, a method can include receiving, at a processing resource of a computing device via a radio of the computing device, first signaling including at least one of text data, audio data, or video data, or any combination thereof, converting, at the processing resource, at least one of the text data, the audio data, or the video data to data representing a sign language, generating, at the processing resource, different video data based at least in part on the data representing the sign language, wherein the different video data comprises instructions for display of a performance of the sign language, transmitting second signaling representing the different video data from the processing resource to a user interface, and displaying the performance of the sign language on the user interface in response to the user interface receiving the second signaling.
    Type: Application
    Filed: April 20, 2021
    Publication date: October 20, 2022
    Inventors: Ariela E. Gruszka, Angela S. Parekh, Mandy W. Fortunati, Teresa M. Di Dio
  • Patent number: 6232176
    Abstract: The invention includes a number of methods and structures pertaining to integrated circuitry. The invention encompasses a method of forming an integrated circuit comprising: a) forming an insulative material layer over a first node location and a second node location, the insulative material layer having an uppermost surface; and b) forming first and second conductive pedestals extending through the insulative material layer and in electrical connection with the first and second node locations, the conductive pedestals comprising exposed uppermost surfaces which are above the uppermost surface of the insulative material layer.
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: May 15, 2001
    Assignee: Micron Technology, Inc.
    Inventors: Kunal R. Parekh, Angela S. Parekh
  • Patent number: 6005268
    Abstract: The invention includes a number of methods and structures pertaining to integrated circuitry. The invention encompasses a method of forming an integrated circuit comprising: a) forming an insulative material layer over a first node location and a second node location, the insulative material layer having an uppermost surface; and b) forming first and second conductive pedestals extending through the insulative material layer and in electrical connection with the first and second node locations, the conductive pedestals comprising exposed uppermost surfaces which are above the uppermost surface of the insulative material layer.
    Type: Grant
    Filed: June 30, 1997
    Date of Patent: December 21, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Kunal R. Parekh, Angela S. Parekh
  • Patent number: 5918122
    Abstract: The invention includes a number of methods and structures pertaining to integrated circuitry. The invention encompasses a method of forming an integrated circuit comprising: a) forming an insulative material layer over a first node location and a second node location, the insulative material layer having an uppermost surface; and b) forming first and second conductive pedestals extending through the insulative material layer and in electrical connection with the first and second node locations, the conductive pedestals comprising exposed uppermost surfaces which are above the uppermost surface of the insulative material layer.
    Type: Grant
    Filed: February 11, 1997
    Date of Patent: June 29, 1999
    Assignee: Micron Technology, Inc.
    Inventors: Kunal R. Parekh, Angela S. Parekh