Abstract: An integrated circuit is formed on a substrate. The integrated circuit includes a transistor formed in the substrate. The transistor has a gate that forms at least one closed-loop. The integrated circuit also includes an ejection element that is coupled to the transistor wherein the ejection element is disposed over the substrate without an intervening field oxide layer.

Abstract: An integrated circuit is formed on a substrate. The integrated circuit includes a transistor formed in the substrate. The transistor has a gate that forms at least one closed-loop. The integrated circuit also includes an ejection element that is coupled to the transistor wherein the ejection element is disposed over the substrate without an intervening field oxide layer.

Abstract: An ink jet printhead includes a printhead substrate having a plurality of thin film layers and three side by side columnar arrays of drop generators formed in the printhead substrate and extending along a longitudinal extent. Each columnar array has ink drop generators that are separated by an ink drop generator pitch P. The ink drop generators produce ink drops having an ink drop volume that enables multi-pass printing of a resolution that is not less than 1/(2P) dpi along a print axis parallel to the longitudinal extent. Three columnar arrays of FET drive circuits formed in the printhead substrate are employed to energize corresponding columnar arrays of ink drop generators.

Abstract: A narrow ink jet printhead having three columnar arrays of ink drop generators configured for multi-pass color printing at a print resolution having a media axis dot spacing that is less than the columnar nozzle spacing of the ink drop generators. The ink jet printhead more particularly includes high resistance heater resistors and efficient FET drive circuits that are configured to compensate for variation in parasitic resistance presented by power traces.

Abstract: A narrow ink jet printhead having four columnar arrays of ink drop generators configured for monochrome single-pass printing at a print resolution having a media axis dot spacing that is less than the columnar nozzle spacing of the ink drop generators. The ink jet printhead more particularly includes high resistance heater resistors and efficient FET drive circuits that are configured to compensate for variation in parasitic resistance presented by power traces.

Abstract: An integrated circuit is formed on a substrate. The integrated circuit includes a transistor formed in the substrate. The transistor has a gate that forms at least one closed-loop. The integrated circuit also includes an ejection element that is coupled to the transistor wherein the ejection element is disposed over the substrate without an intervening field oxide layer.

Abstract: An ink jet printhead having three columnar arrays of drop generators that produce drops having an drop volume that enables multi-pass printing at a print resolution that is not less than 1/(2P) dpi along a reference axis, wherein P is a drop generator pitch, and three columnar arrays of FET drive circuits respectively adjacent the columnar arrays of drop generators.

Abstract: A narrow ink jet printhead having three columnar arrays of ink drop generators configured for multi-pass color printing at a print resolution having a media axis dot spacing that is less than the columnar nozzle spacing of the ink drop generators. The ink jet printhead more particularly includes high resistance heater resistors and efficient FET drive circuits that are configured to compensate for variation in parasitic resistance presented by power traces.

Abstract: A narrow ink jet printhead having four columnar arrays of ink drop generators configured for monochrome single-pass printing at a print resoluion having a media axis dot spacing that is less than the columnar nozzle spacing of the ink drop generators. The ink jet printhead more particularly includes high resistance heater resistors and efficient FET drive circuits that are configured to compensate for variation in parasitic resistance presented by power traces.

Abstract: An integrated circuit is formed on a substrate. The integrated circuit includes a transistor formed in the substrate. The transistor has a gate that forms at least one closed-loop. The integrated circuit also includes an ejection element that is coupled to the transistor wherein the ejection element is disposed over the substrate without an intervening field oxide layer.

Abstract: An ink jet printhead having a plurality of columnar arrays of ink drop generators that have different center to center spacing along a reference axis. The ink jet printhead further includes ink feed slots that are each fluidically connected to only one columnar array of ink drop generators.

Abstract: An ink jet printhead having a first plurality of ink drop generators disposed along a first edge of an ink feed slot, and a second plurality of ink drop generators disposed along a second edge of the ink feed slot that is opposite the first edge. The ink drop generators are arranged in a plurality of groups called primitives, and each primitive includes a first subgroup of ink drop generators disposed along the first edge and a second subgroup of ink drop generators along second edge, whereby the first subgroup of each primitive includes a subset of the first plurality of ink drop generators and whereby the second subgroup of each primitive includes a subset of the second plurality of ink drop generators. In this manner each primitive is bifurcated across said ink feed slot.

Abstract: An ink jet printhead having first and second arrays of ink drop generators adjacent edges of a printhead substrate, third and fourth arrays of ink drop generators inboard of the first and second ink drop generator arrays, a first ink feed slot adjacent the first ink drop generator array which receives ink only from the first ink feed slot, a second ink feed slot adjacent the second ink drop generator array which receives ink only from the second ink feed slot, and a third ink feed slot between the third and fourth ink drop generator arrays which receive ink from the third ink feed slot. Circuit regions are provided in the printhead substrate between the first ink feed slot and the third ink drop generator array, and between the second ink feed slot and the fourth ink drop generator array.