Abstract: Dynamic random access memory with variable configuration depending on the number and capacity of standard memory modules, of DIMM type plugged into a first plurality of slots of a memory motherboard comprising a control unit, into which it is possible to plug, into the first plurality of slots, in substitution for the memory modules, expansion supports, in turn provided with a second plurality of slots for the insertion of standard memory modules of DIMM type, and of column address latch registers each associated with a slot of the second plurality and thereby to support and allow the configurability and operability of interleaved-block memory, and access cycles, with partial time overlap, without renouncing the use of commercially available DIMM memory modules and without burdening the basic memory configuration with all the overheads required to support the interleaved-block configuration.

Abstract: A multi-processor system in wherein a plurality of processors have access to a plurality of shared memory modules, comprising a memory control unit, interconnection logic circuits, a system bus for the multipoint connection of the processors to the memory control unit and for the transfer of memory addresses and commands for ordered and successive read/write operations via the system bus and the memory control unit, whilst the transfer of data to and from the memory modules takes place through data channels which connect the various processors on a point-to-point basis to the interconnection logic circuits and via these to a memory data transfer channel.

Abstract: A multiprocessor system having global data replicated in all local memories, each local memory related to one of the system central processing units (CPUs), where consistency of the global data in each of the local memories is provided by a global write procedure according to which an agent CPUZ, willing to modify a global data in its own local memory, issues a write command on the system bus for performing the write operation in the local memory of another destination CPU of the system and characterizes the write command as a global write, so that all the CPUs connected to the system bus (including CPUZ) detect such command, perform such write operation in their related local memory and provide the destination CPU with a signal indicative of a performed write operation, so that the destination CPU, as "replier", may signal to CPUZ the successful execution of the global write.

Abstract: The invention concerns the reinforcement of a moldable material by means of fibers composed of a filiform body with, at each end, an anchoring device consisting a body in the shape of a solid of revolution, with transversal dimensions exceeding filiform body diameter.

Abstract: To make a continuous fiber-reinforced concrete slab, a totally free and independent slab is cast by using limited shrinkage concrete. After having carefully prepared a course, a separation sheet is layed thereon and a compressible mattress is intercalated between the concrete and the constructions or construction parts susceptible of limiting or traversing the slab.

Abstract: Filiform element usable for reinforcing moldable materials particularly concrete, said filiform element having crimpings or corrugations distributed over its length, showing the following features: maximum wave amplitude of the longitudinal axis: 1 to 1.5 d; maximum wave-length: 10 d; minimum wave-length: 7 d; maximum fiber length: 65 d; minimum fiber length: 45 d; fiber diameter (d): max. 1.2 mm; nature of the steel: ultimate tensile strength higher than 110 kg/mm.sup.2 and lower than 150 kg/mm.sup.2.