Patents by Inventor Angelo Dati

Angelo Dati has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10613223
    Abstract: A system for detecting objects, for driver assistance equipment in motor vehicles for example, includes a transmitter for transmitting towards an object an optical signal having a signal energy. The optical signal transmitted includes at least one encoded pulse sequence with the signal energy distributed over the pulse sequence. A receiver receives an echo signal resulting from reflection of the optical signal at the object with the time delay of the echo signal is indicative of the distance to the object.
    Type: Grant
    Filed: August 25, 2017
    Date of Patent: April 7, 2020
    Assignee: STMicroelectronics S.r.l.
    Inventors: Maurizio Zuffada, Angelo Dati, Salvatore Mario Rotolo, Melchiorre Bruccoleri, Antonio Fincato
  • Publication number: 20180188368
    Abstract: A system for detecting objects, for driver assistance equipment in motor vehicles for example, includes a transmitter for transmitting towards an object an optical signal having a signal energy. The optical signal transmitted includes at least one encoded pulse sequence with the signal energy distributed over the pulse sequence. A receiver receives an echo signal resulting from reflection of the optical signal at the object with the time delay of the echo signal is indicative of the distance to the object.
    Type: Application
    Filed: August 25, 2017
    Publication date: July 5, 2018
    Inventors: Maurizio Zuffada, Angelo Dati, Salvatore Mario Rotolo, Melchiorre Bruccoleri, Antonio Fincato
  • Patent number: 8867625
    Abstract: A method of storing a data file, particularly in the MPEG format and including a flow of different frames, comprises a protection system for the data file based on a parameter stored in the data file. Advantageously, the storage method comprises selectively protecting the frames by storing parameters that are associated with corresponding different frames whose values are selected to provide a playing quality level requested by an end user. Also, a method is provided for decoding a data file, particularly of the MPEG type and including a flow of different frames, wherein the data file is stored per above.
    Type: Grant
    Filed: November 9, 2007
    Date of Patent: October 21, 2014
    Assignee: STMicroelectronics S.r.l.
    Inventors: Giorgio Betti, Angelo Dati, Viviana D'Alto, Danilo Pau, Filippo Santinello
  • Patent number: 7446968
    Abstract: The method and architecture improve the robustness of a synchronization system through a minimum latency loop, for Hard Disk Drives (HDD), for example, wherein synchronous detection processing is performed for timing recovering of a correct sampling phase and frequency and by a first acquisition step of a known preamble signal pattern, for generating a timing periodic signal, followed by a second tracking step, for recovering phase, frequency and gain sampling errors of the synchronization signal including a header followed by an unknown data content. Advantageously, a feedback loop including a numeric preamble generator (NPG) is provided for obtaining a reduced latency in the acquisition phase. The NPG stores preamble values for different phase offset.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: November 4, 2008
    Assignee: STMicroelectronics S.r.L.
    Inventors: Davide Giovenzana, Angelo Dati, Augusto Andrea Rossi
  • Patent number: 7430704
    Abstract: A method for detecting signals affected by intersymbol interference provides for a path memory in the form of a trellis admitting survivor paths comprising a first and a second stage. The first stage includes a shift register exchange with a given number of states and a given length ?. The first stage outputs a first state SAkk-? on the survivor path for the best state Ak, and a second state SBkk-? on the survivor path for another state Bk. The second stage is configured as a two-state shift register exchange having a respective memory length ?, including respective first and second registers. In the respective first and second registers the survivor paths are stored leading to a respective first ?0k and second ?1k state, whereby the respective first register contains the backend of the best survivor path, while the respective second register contains the backend of an alternative survivor path.
    Type: Grant
    Filed: December 20, 2004
    Date of Patent: September 30, 2008
    Assignees: STMicroelectronics S.r.l., Maxtor Corporation
    Inventors: Angelo Dati, Pierandrea Savo, Ezio Iacazio, Kelly Fitzpatrick, John J. McEwen, legal representative, Bahjat Zafer, Peter McEwen
  • Patent number: 7379516
    Abstract: A receiver in a data read channel has an input terminal for receiving an input signal provided by a transmitter of the data read channel, and produces an output signal at an output terminal. The receiver includes a finite impulse response (FIR) filter coupled to the input terminal and having filter coefficients capable of being adapted, an interpolated timing-recovery circuit coupled to an output of the FIR filter, the timing-recovery circuit having an output signal coupled to the output terminal of the receiver, and a timer circuit coupled to the output terminal and feedback connected to the timing-recovery circuit, wherein the coefficients of the timing-recovery circuit are dynamically adapted using a cost weighted function through a signal power spectrum of the data read channel.
    Type: Grant
    Filed: July 2, 2002
    Date of Patent: May 27, 2008
    Assignee: STMicroelectronics S.r.l.
    Inventors: Angelo Dati, Filippo Brenna, Davide Giovenzana
  • Publication number: 20080063375
    Abstract: A method of storing a data file, particularly in the MPEG format and including a flow of different frames, comprises a protection system for the data file based on a parameter stored in the data file. Advantageously, the storage method comprises selectively protecting the frames by storing parameters that are associated with corresponding different frames whose values are selected to provide a playing quality level requested by an end user. Also, a method is provided for decoding a data file, particularly of the MPEG type and including a flow of different frames, wherein the data file is stored per above.
    Type: Application
    Filed: November 9, 2007
    Publication date: March 13, 2008
    Inventors: Giorgio Betti, Angelo Dati, Viviana D'Alto, Danilo Pau, Filippo Santinello
  • Patent number: 7295764
    Abstract: A method of storing a data file, particularly in the MPEG format and including a flow of different frames, comprises a protection system for the data file based on a parameter stored in the data file. Advantageously, the storage method comprises selectively protecting the frames by storing parameters that are associated with corresponding different frames whose values are selected to provide a playing quality level requested by an end user. Also, a method is provided for decoding a data file, particularly of the MPEG type and including a flow of different frames, wherein the data file is stored per above.
    Type: Grant
    Filed: June 20, 2002
    Date of Patent: November 13, 2007
    Assignee: SIMicroelectronics S.r.l.
    Inventors: Giorgio Betti, Angelo Dati, Viviana D'Alto, Danilo Pau, Filippo Santinello
  • Patent number: 7280295
    Abstract: A method for storing user data on a hard disk drive system comprises distributing user data across a plurality of independent data sectors, with each data sector including a first header having a first preamble field and a first sync mark field, and a second header having a second preamble field and a second sync mark field. The method performs a first timing recovery phase for recovering signal amplitude by acquiring phase and frequency lock from at least one of the preamble fields, and performs a subsequent frame synchronous detection phase by acquiring a corresponding sync mark field.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: October 9, 2007
    Assignee: STMicroelectronics S.r.l.
    Inventors: Angelo Dati, Augusto Andrea Rossi, Davide Giovenzana
  • Patent number: 7203884
    Abstract: In the MSN encoded form, the symbols of each block of the present invention define a running digital sum (RDS) value, defined as RDS([a0a1 . . . aN?1])=??i(?1)ai where the symbols ai belong to the set {0, 1} and the sum extends for values of i from 0 to N?1. An encoder is configured to satisfy at least one of the following characteristics: a) blocks of symbols with a given length (L) are used for encoding, wherein RDS=RDS0+4.K, where K is an integer, RDS is the said running digital sum, RDS0 is defined as zero for even values of the said length (L), and one for odd values of said length (L), and b) blocks of symbols with a given length (L) are used for MSN coding and encoding is effected by selecting encoded blocks such that the set of running digital sum (RDS) values is the set with the minimum number of elements that satisfy the required rate value, defined as the ratio between the length of the input blocks and the length of the output blocks.
    Type: Grant
    Filed: April 7, 2003
    Date of Patent: April 10, 2007
    Assignee: STMicroeletronics S.R.L.
    Inventors: Angelo Dati, Augusto Rossi, Davide Giovenzana
  • Publication number: 20060171049
    Abstract: A method is provided for optimizing a PRML (Partial Response Maximum Likelihood) receiving channel for mass memory data receiving systems comprising an input receiving channel, a receiver placed downstream of the channel, a detector connected in cascade to the receiver, and a summing node being input both the receiver output through a delay line, and the output from the detector through an impulsive filter. The method includes performing an indirect estimate of the noise strength by filtering out the error sequence, i.e. the output signal from the summing node, through a filter, and selecting either the output from the summing node or the output from the filter to obtain an optimization parameter for feedback to the receiving system.
    Type: Application
    Filed: April 4, 2006
    Publication date: August 3, 2006
    Inventors: Angelo Dati, Cecilia Tonci, Paolo Gaducci
  • Publication number: 20060023332
    Abstract: The method and architecture improve the robustness of a synchronization system through a minimum latency loop, for Hard Disk Drives (HDD), for example, wherein synchronous detection processing is performed for timing recovering of a correct sampling phase and frequency and by a first acquisition step of a known preamble signal pattern, for generating a timing periodic signal, followed by a second tracking step, for recovering phase, frequency and gain sampling errors of the synchronization signal including a header followed by an unknown data content. Advantageously, a feedback loop including a numeric preamble generator (NPG) is provided for obtaining a reduced latency in the acquisition phase. The NPG stores preamble values for different phase offset.
    Type: Application
    Filed: July 25, 2005
    Publication date: February 2, 2006
    Applicant: STMicroelectronics S.r.I.
    Inventors: Davide Giovenzana, Angelo Dati, Augusto Rossi
  • Patent number: 6981201
    Abstract: A system for decoding digital signals subjected to block coding includes a post-processor that corrects the codewords affected by error, identifying them with the most likely sequence that is a channel sequence and that satisfies a syndrome check. The post-processor is a finite-state machine described by a graph that represents the set of error events. The post-processor evolves in steps through subsequent transition matrices, deleting at each step the paths that accumulate an invalid number of error events or an excessive number of wrong bits, paths that accumulate a total reliability higher than a given threshold, paths with an invalid check on the received sequence, and paths that reveal an invalid syndrome after having reached a maximum number of events.
    Type: Grant
    Filed: September 18, 2002
    Date of Patent: December 27, 2005
    Assignee: STMicroelectronics S.R.L.
    Inventors: Luca Reggiani, Giorgio Betti, Filippo Brenna, Angelo Dati, Davide Giovenzana, Augusto Rossi
  • Publication number: 20050264907
    Abstract: A method for storing user data on a hard disk drive system comprises distributing user data across a plurality of independent data sectors, with each data sector including a first header having a first preamble field and a first sync mark field, and a second header having a second preamble field and a second sync mark field. The method performs a first timing recovery phase for recovering signal amplitude by acquiring phase and frequency lock from at least one of the preamble fields, and performs a subsequent frame synchronous detection phase by acquiring a corresponding sync mark field.
    Type: Application
    Filed: May 26, 2005
    Publication date: December 1, 2005
    Applicant: STMicroelectronics S.r.I.
    Inventors: Angelo Dati, Augusto Rossi, Davide Giovenzana
  • Publication number: 20050246614
    Abstract: A method for detecting signals affected by intersymbol interference provides for a path memory being arranged in the form of a trellis admitting survivor paths comprising a first and a second stage. The first stage includes a shift register exchange with a given number of states and a given length ?. At time k-?, where ? is said given length, the first stage outputs a) a first state SAkk-? on the survivor path for the best state Ak at time k, while keeping track of the parity for the state at time k-? for each of the survivor paths in said path memory, and b) a second state SBkk-? on the survivor path for another state Bk having the same intersymbol interference state as said best state Ak and the opposite priority state. The second stage as is a two-state shift register exchange having a respective memory length ?, including respective first and second registers.
    Type: Application
    Filed: December 20, 2004
    Publication date: November 3, 2005
    Inventors: Angelo Dati, Pierandrea Savo, Ezio Iacazio, Kelly Fitzpatrick, Peter McEwen, Bahjat Zafer, John McEwen
  • Patent number: 6934102
    Abstract: A system provides two distinct solutions for encoding and decoding servo positioning data for a hard disk drive. A first solution includes: encoding each group of four bits of a pattern signal in a Matched Spectral Null (MSN) format through an intermediate rate 4/6 code; providing a duplicated bit for each bit of the six bit code word obtained with the previous step. A second solution includes: encoding each group of four bit of the pattern signal adding a parity check bit as an intermediate rate ? code; encoding each of the five bits using the biphase map. Both solutions include subsequently: reading a servo wedge information signal using a read and write channel of the hard disk drive; and using a trellis Partial Response decoding scheme matched to the encoded word for obtaining angular and radial information for the head positioning.
    Type: Grant
    Filed: December 28, 2001
    Date of Patent: August 23, 2005
    Assignee: STMicroeletronics S.r.l.
    Inventors: Angelo Dati, Davide Giovenzana
  • Publication number: 20030217326
    Abstract: In the MSN encoded form, the symbols of each block of the present invention define a running digital sum (RDS) value, defined as RDS([a0a1 . . . aN−1])=−&Sgr;i(−1)ai where the symbols ai belong to the set {0,1} and the sum extends for values of i from 0 to N−1. An encoder is configured to satisfy at least one of the following characteristics: a) blocks of symbols with a given length (L) are used for encoding, wherein RDS=RDS0+4.
    Type: Application
    Filed: April 7, 2003
    Publication date: November 20, 2003
    Inventors: Angelo Dati, Augusto Rossi, Davide Giovenzana
  • Publication number: 20030128449
    Abstract: A system provides two distinct solutions for encoding and decoding servo positioning data for a hard disk drive. A first solution includes: encoding each group of four bits of a pattern signal in a Matched Spectral Null (MSN) format through an intermediate rate {fraction (4/6)} code; providing a duplicated bit for each bit of the six bit code word obtained with the previous step. A second solution includes: encoding each group of four bit of the pattern signal adding a parity check bit as an intermediate rate ⅘ code; encoding each of the five bits using the biphase map. Both solutions include subsequently: reading a servo wedge information signal using a read and write channel of the hard disk drive; and using a trellis Partial Response decoding scheme matched to said encoded word for obtaining angular and radial information for the head positioning.
    Type: Application
    Filed: December 28, 2001
    Publication date: July 10, 2003
    Applicant: STMicroelectronics S.r.I.
    Inventors: Angelo Dati, Davide Giovenzana
  • Publication number: 20030101410
    Abstract: A method and apparatus for detecting and correcting errors in a magnetic recording channel of a mass storage system that combines a Soft Output Viterbi Algorithm SOVA, which has the capability of detecting the reliability of a discrete, equalized signal, and a post processor, which has the capability of detecting specific error events in said discrete, equalized signal, so as to correct error events and to generate an output bit stream.
    Type: Application
    Filed: June 21, 2002
    Publication date: May 29, 2003
    Applicant: STMicroelectronics S.r.I
    Inventors: Giorgio Betti, Filippo Brenna, Angelo Dati, Augusto Rossi, Luca Reggiani
  • Publication number: 20030066021
    Abstract: A system For decoding digital signals subjected to block coding comprising a post-processor which corrects the codewords affected by error, identifying them with the most likely sequence which is a channel sequence and which satisfies a syndrome check. The post-processor is a finite-state machine described by a graph which represents the set of error events, the set of respective transitions defining the structure of said set of error events. Preferably, the post-processor evolves in steps through subsequent transition matrices, deleting at each step the paths which accumulate an invalid number of error events or an excessive number of wrong bits, paths which accumulate a total reliability higher than a given threshold, paths with a invalid check on the received sequence, and paths which reveal an invalid syndrome after having reached a maximum number of events.
    Type: Application
    Filed: September 18, 2002
    Publication date: April 3, 2003
    Inventors: Luca Reggiani, Giorgio Betti, Filippo Brenna, Angelo Dati, Davide Giovenzana, Augusto Rossi