Abstract: A pre-stored digital word generator, more particularly, a digital word generator for providing multiple digital words. The pre-stored digital word generator includes a edge memory used to store a primary preset information; an edge address counter used to point to an address of the edge memory; a reloadable down counter used to count according to the primary preset information and trigger the edge address counter; and multiple word generating circuits having a secondary preset information. Therein, the word generating circuits compare the primary and secondary preset information and then produce the digital words according to a comparison result.

Abstract: A pre-stored digital word generator, more particularly, a digital word generator for providing multiple digital words. The pre-stored digital word generator includes a edge memory used to store a primary preset information; an edge address counter used to point to an address of the edge memory; a reloadable down counter used to count according to the primary preset information and trigger the edge address counter; and multiple word generating circuits having a secondary preset information. Therein, the word generating circuits compare the primary and secondary preset information and then produce the digital words according to a comparison result.

Abstract: A digital word is generated by storing the timing of the leading edge and trailing edge in a digital memory. The memory is addressed from a counter. The timing of the output of the memory is compared with a reference leading edge timing and a reference trailing edge timing in separate digital comparators. The coincidence of the timing of the stored timing in the memory and the reference timing sets and resets a flip-flop to generate a digital word.

Abstract: A low supply voltage for operating an operational amplifier operating as a voltage follower is derived from a high voltage source. Two npn transistors, two Zener diodes and a current source are connected in series across the high voltage source. The input voltage (to the operational amplifier) plus a Zener reference voltage is applied to the base of the transistor near the positive terminal of the high voltage source. Then, a low positive supply voltage V+ nearly equal to the input voltage plus the Zener voltage (Vi+Vz) is derived at the emitter. This low positive supply voltage V− is derived by dropping V+ through the two series Zener diodes to obtain a low negative supply voltage equal to (Vi−Vz).