Patents by Inventor Anh Do

Anh Do has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240127890
    Abstract: In one example, a non-volatile memory system, comprises an array of non-volatile memory cells arranged in rows and columns, each non-volatile memory cell comprising a source and a drain; a plurality of bit lines, each of the plurality of bit lines coupled to the drain or each non-volatile memory cell in a column of non-volatile memory cells; a source line coupled to the source of each non-volatile memory cell; and an adaptive bias decoder for providing a voltage to an erase gate line of the array during an operation, wherein the adaptive bias decoder adjusts the voltage provided to the erase gate line in response to changes in a voltage of the source line.
    Type: Application
    Filed: December 11, 2023
    Publication date: April 18, 2024
    Inventors: Hieu Van Tran, THUAN VU, STANLEY HONG, STEPHEN TRINH, ANH LY, NHAN DO, MARK REITEN
  • Publication number: 20240112736
    Abstract: In one example, a non-volatile memory system, comprises an array of non-volatile memory cells arranged in rows and columns, each non-volatile memory cell comprising a source and a drain; a plurality of bit lines, each of the plurality of bit lines coupled to the drain or each non-volatile memory cell in a column of non-volatile memory cells; a source line coupled to the source of each non-volatile memory cell; and an adaptive bias decoder for providing a voltage to the source line of the array during operation.
    Type: Application
    Filed: December 11, 2023
    Publication date: April 4, 2024
    Inventors: Hieu Van Tran, Thuan Vu, Stanley Hong, Stephen Trinh, Anh Ly, Nhan Do, Mark Reiten
  • Publication number: 20240105263
    Abstract: In one example, a non-volatile memory system comprises an array of non-volatile memory cells arranged in rows and columns, each non-volatile memory cell comprising a source and a drain; a plurality of bit lines, each of the plurality of bit lines coupled to the drain of each non-volatile memory cell in a column of non-volatile memory cells; a source line coupled to the source of each non-volatile memory cell; and an adaptive bias decoder for providing a voltage to a word line of the array during an operation, wherein the adaptive bias decoder adjusts the voltage provided to the word line in response to changes in a voltage of the source line.
    Type: Application
    Filed: December 11, 2023
    Publication date: March 28, 2024
    Applicant: Silicon Storage Technology, Inc.
    Inventors: Hieu Van TRAN, Thuan VU, Stanley HONG, Stephen TRINH, Anh LY, Nhan DO, Mark REITEN
  • Patent number: 11915747
    Abstract: Numerous examples for performing tuning of a page or a word of non-volatile memory cells in an analog neural memory are disclosed. In one example, an analog neural memory system comprises an array of non-volatile memory cells arranged into rows and columns, each non-volatile memory cell comprising a word line terminal, a bit line terminal, and an erase gate terminal; a plurality of word lines, each word line coupled to word line terminals of a row of non-volatile memory cells; a plurality of bit lines, each bit line coupled to bit line terminals of a column of non-volatile memory cells; and a plurality of erase gate enable transistors, each erase gate enable transistor coupled to erase gate terminals of a word of non-volatile memory cells.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: February 27, 2024
    Assignee: SILICON STORAGE TECHNOLOGY, INC.
    Inventors: Hieu Van Tran, Thuan Vu, Stephen Trinh, Stanley Hong, Anh Ly, Steven Lemke, Vipin Tiwari, Nhan Do
  • Patent number: 11687288
    Abstract: A method of queue design for data storage and management applies RAM data synchronization technology on many distributed nodes, both ensures storage performance and solves the problem of data loss in the system operation process; performs business separation and parallelize actions to optimize processing performance; uses simply extracted information instead of accessing the original information helps to speed up the processing ability and promptly detect events that exceed the threshold; allocates a fixed memory for the queue to ensure the safety of the whole system; in addition, provides monitoring and early warning of possible incidents. The method includes: step 1: build a deployment model; step 2: initialize the values when the application first launches; step 3: process write data to the queue; step 4: detect the threshold and process the data in the queue; step 5: remove processed data from the queue; step 6: monitor queue and early warn.
    Type: Grant
    Filed: October 26, 2021
    Date of Patent: June 27, 2023
    Assignee: VIETTEL GROUP
    Inventors: Thanh Phong Pham, The Anh Do, Thi Huyen Dang, Viet Anh Nguyen
  • Publication number: 20220129203
    Abstract: A method of queue design for data storage and management applies RAM data synchronization technology on many distributed nodes, both ensures storage performance and solves the problem of data loss in the system operation process; performs business separation and parallelize actions to optimize processing performance; uses simply extracted information instead of accessing the original information helps to speed up the processing ability and promptly detect events that exceed the threshold; allocates a fixed memory for the queue to ensure the safety of the whole system; in addition, provides monitoring and early warning of possible incidents. The method includes: step 1: build a deployment model; step 2: initialize the values when the application first launches; step 3: process write data to the queue; step 4: detect the threshold and process the data in the queue; step 5: remove processed data from the queue; step 6: monitor queue and early warn.
    Type: Application
    Filed: October 26, 2021
    Publication date: April 28, 2022
    Applicant: VIETTEL GROUP
    Inventors: Thanh Phong Pham, The Anh Do, Thi Huyen Dang, Viet Anh Nguyen
  • Publication number: 20200306297
    Abstract: Vesicular stomatitis virus glycoprotein (VSVG) can both load protein cargo onto exosomes and increase their delivery ability via a pseudotyping mechanism. By fusing a set of fluorescent and luminescent reporters with VSVG, we show the successful targeting and incorporation of VSVG fusions into exosomes by gene transfection and fluorescence tracking. VSVG pseudotyping of exosomes does not affect the size or distributions of the exosomes, and both the full-length VSVG and the VSVG without the ectodomain integrate into the exosomal membrane, suggesting that the ectodomain is not required for protein loading. Finally, exosomes pseudotyped with full-length VSVG are internalized by multiple-recipient cell types to a greater degree compared to exosomes loaded with VSVG without the ectodomain, confirming a role of the ectodomain in cell tropism.
    Type: Application
    Filed: June 12, 2020
    Publication date: October 1, 2020
    Inventors: Biao Lu, Daniel Levy, Mai Anh Do
  • Patent number: 8954579
    Abstract: Embodiments are directed to verifying the accessibility and functionality of an online service and to scheduling the automatic execution of an online service. In one scenario, a computer system receives online service workflows and corresponding expected outcomes for each workflow. Each online service workflow is associated with an online service, and each online service workflow includes workflow steps that cause the online service to perform specified operations that produce observable outcomes within a specified amount of time specified by the online service provider. The computer system executes at least one of the received online service workflows and abandons execution of the online service workflow if execution is not completed within the specified amount of time. The computer system also compares the outcomes of the workflow execution to the expected outcomes corresponding to the executed online service workflow and generates a report that includes the results of the comparison.
    Type: Grant
    Filed: August 21, 2012
    Date of Patent: February 10, 2015
    Assignee: Microsoft Corporation
    Inventors: Minh Quang Anh Do, Dong Cao, Mahesh Dudgikar
  • Publication number: 20140059199
    Abstract: Embodiments are directed to verifying the accessibility and functionality of an online service and to scheduling the automatic execution of an online service. In one scenario, a computer system receives online service workflows and corresponding expected outcomes for each workflow. Each online service workflow is associated with an online service, and each online service workflow includes workflow steps that cause the online service to perform specified operations that produce observable outcomes within a specified amount of time specified by the online service provider. The computer system executes at least one of the received online service workflows and abandons execution of the online service workflow if execution is not completed within the specified amount of time. The computer system also compares the outcomes of the workflow execution to the expected outcomes corresponding to the executed online service workflow and generates a report that includes the results of the comparison.
    Type: Application
    Filed: August 21, 2012
    Publication date: February 27, 2014
    Applicant: MICROSOFT CORPORATION
    Inventors: Minh Quang Anh Do, Dong Cao, Mahesh Dudgikar
  • Patent number: 8242872
    Abstract: Embodiments of the invention provide a transformer comprising: a first coil element having a transverse axis along a transverse direction, the first coil element having p turns where p is greater than or equal to 1; and a second coil element having a transverse axis generally parallel to the transverse axis of the first coil element, the second coil element having n turns, where n is greater than or equal to 5p; wherein the first and second coil elements are arranged to provide electromagnetic coupling between the coil elements along a portion of a length of the second coil element in both a transverse direction parallel to the transverse axes and a lateral direction, wherein the lateral direction is a direction normal to the transverse axes.
    Type: Grant
    Filed: July 19, 2007
    Date of Patent: August 14, 2012
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Chee Chong Lim, Kok Wai Chew, Kiat Seng Yeo, Suh Fei Lim, Manh Anh Do, Lap Chan
  • Patent number: 8237531
    Abstract: An inductor circuit with high quality (Q) factor includes a primary inductor and a compensation sub-circuit. The compensation sub-circuit is electrically isolated from the primary inductor. The compensation sub-circuit is magnetically coupled with the primary inductor to compensate the loss in the primary inductor.
    Type: Grant
    Filed: December 31, 2007
    Date of Patent: August 7, 2012
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Ping Qiu, Chirn Chye Boon, Johnny Kok Wai Chew, Kiat Seng Yeo, Manh Anh Do, Lap Chan, Suh Fei Lim
  • Patent number: 7570144
    Abstract: An integrated transformer structure includes a first coil element associated with a transverse axis, the first coil element having at least one turn. The first coil element includes a first portion provided on a first lateral level, and a second portion provided on a second lateral level. The first and second lateral levels being mutually spaced apart along said transverse axis. The first and second portions being displaced laterally from said axis by different respective distances. At least one crossover portion of the first coil element, in which the first coil element being configured to provide a conducting path through at least a portion of the first portion of the first coil element to the crossover portion, through the crossover portion and subsequently through at least a portion of the second portion of the first coil element, in which any change of flow direction along said path is less than 90° in a lateral direction.
    Type: Grant
    Filed: May 18, 2007
    Date of Patent: August 4, 2009
    Assignees: Chartered Semiconductor Manufacturing, Ltd., Nanyang Technological University
    Inventors: Chee Chong Lim, Kok Wai Chew, Kiat Seng Yeo, Suh Fei Lim, Manh Anh Do, Lap Chan
  • Publication number: 20090167466
    Abstract: An inductor circuit with high quality (Q) factor includes a primary inductor and a compensation sub-circuit. The compensation sub-circuit is electrically isolated from the primary inductor. The compensation sub-circuit is magnetically coupled with the primary inductor to compensate the loss in the primary inductor.
    Type: Application
    Filed: December 31, 2007
    Publication date: July 2, 2009
    Applicants: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD., NANYANG TECHNOLOGICAL UNIVERSITY
    Inventors: Ping QIU, Chirn Chye BOON, Johnny Kok Wai CHEW, Kiat Seng YEO, Manh Anh DO, Lap CHAN, Suh Fei LIM
  • Publication number: 20080320397
    Abstract: An online service that allows multiple users to share electronic documents over a computer network. Each user may access the online system after specifying the user's credentials, after which the user may view the user interface specific to that user. The user interface may contain multiple panes, such as a navigation pane and a work pane. The navigation pane may list files owned by the user and may also list files shared with the user by other users. A user may select a file in the navigation pane to view the contents of the file in the work pane. A user may also select a file to share with other users, and the shared file will automatically appear in the other users' interfaces. A user may additionally share a file with a user not registered with the system, and the unregistered user may access the file through a generic interface or may register and then view the file.
    Type: Application
    Filed: June 19, 2007
    Publication date: December 25, 2008
    Applicant: Microsoft Corporation
    Inventors: Anh Do, Martin Gannholm
  • Publication number: 20080284552
    Abstract: An integrated transformer structure includes a first coil element associated with a transverse axis, the first coil element having at least one turn. The first coil element includes a first portion provided on a first lateral level, and a second portion provided on a second lateral level. The first and second lateral levels being mutually spaced apart along said transverse axis. The first and second portions being displaced laterally from said axis by different respective distances. At least one crossover portion of the first coil element, in which the first coil element being configured to provide a conducting path through at least a portion of the first portion of the first coil element to the crossover portion, through the crossover portion and subsequently through at least a portion of the second portion of the first coil element, in which any change of flow direction along said path is less than 90° in a lateral direction.
    Type: Application
    Filed: May 18, 2007
    Publication date: November 20, 2008
    Applicants: Chartered Semiconductor Manufacturing, Ltd., Nanyang Technological University
    Inventors: Chee Chong Lim, Kok Wai Chew, Kiat Seng Yeo, Suh Fei Lim, Manh Anh Do, Lap Chan
  • Publication number: 20080284553
    Abstract: Embodiments of the invention provide a transformer comprising: a first coil element having a transverse axis along a transverse direction, the first coil element having p turns where p is greater than or equal to 1; and a second coil element having a transverse axis generally parallel to the transverse axis of the first coil element, the second coil element having n turns, where n is greater than or equal to 5 p; wherein the first and second coil elements are arranged to provide electromagnetic coupling between the coil elements along a portion of a length of the second coil element in both a transverse direction parallel to the transverse axes and a lateral direction, wherein the lateral direction is a direction normal to the transverse axes.
    Type: Application
    Filed: July 19, 2007
    Publication date: November 20, 2008
    Applicants: CHARTERED SEMICONDUCTOR MANUFACTURING, LTD., NANYANG TECHNOLOGICAL UNIVERSITY
    Inventors: Chee Chong LIM, Kok Wai CHEW, Kiat Seng YEO, Suh Fei LIM, Manh Anh DO, Lap CHAN
  • Patent number: 7023315
    Abstract: A method of fabricating an inductor using bonding techniques in the manufacture of integrated circuits is described. Bonding pads are provided over a semiconductor substrate. Input/output connections are made to at least two of the bonding pads. A plurality of wire bond loops are made between each two of the bonding pads wherein the plurality of wire bond loops forms the inductor.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: April 4, 2006
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Kiat Seng Yeo, Hai Peng Tan, Jianguo Ma, Manh Anh Do, Kok Wai Johnny Chew
  • Patent number: 6998953
    Abstract: A method of fabricating an inductor using bonding techniques in the manufacture of integrated circuits is described. Bonding pads are provided over a semiconductor substrate. Input/output connections are made to at least two of the bonding pads. A plurality of wire bond loops are made between each two of the bonding pads wherein the plurality of wire bond loops forms the inductor.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: February 14, 2006
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Kiat Seng Yeo, Hai Peng Ian, Jiangud Ma, Manh Anh Do, Johnny Kok Wai Chew
  • Patent number: 6803848
    Abstract: A new structure and method is provided for the creation of an inductor on the surface of a silicon semiconductor substrate. The inductor is of a helix coil design having upper level and lower level conductors further having an axis whereby the axis of the helix coil of the inductor is parallel to the plane of the underlying substrate. Under the first embodiment of the invention, the height of the helix coil that is created on the surface of a silicon substrate is uniform. Under the second embodiment of the invention the height of the helix coil of the inductor of the invention is uniform while a ferromagnetic core is inserted between the upper and the lower level conductors of the helix coil. Under the third embodiment of the invention, the height of the helix coil that is created on the surface of a silicon substrate is non-uniform.
    Type: Grant
    Filed: October 15, 2002
    Date of Patent: October 12, 2004
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Kiat Seng Yeo, Hai Peng Tan, Jian Guo Ma, Manh Anh Do, Kok Wai Johnny Chew
  • Patent number: 6800533
    Abstract: A new structure is provided for the creation of an inductor on the surface of a silicon semiconductor substrate. The inductor is of spiral design and perpendicular to the plane of the underlying substrate. Conductor line width can be selected as narrow or wide, ferromagnetic material can be used to fill the spaces between the conductors of the spiral inductor. The spiral inductor of the invention can further by used in series or in series with conventional horizontal inductors.
    Type: Grant
    Filed: March 6, 2000
    Date of Patent: October 5, 2004
    Assignee: Chartered Semiconductor Manufacturing Ltd.
    Inventors: Kiat Seng Yeo, Hai Peng Tan, Jian Guo Ma, Manh Anh Do, Kok Wai Johnny Chew