Abstract: A method is disclosed for reproducibly and controllably enhancing the current gain of a bipolar junction transistor. Prior to depositing an extrinsic emitter region of polycrystalline silicon, the surface of a monocrystalline silicon substrate is nitridized to grow a layer of silicon nitride thereon. The interfacial layer of silicon nitride functions as a tunnel insulator to enhance the current gain of the transistor and as a diffusion barrier to prevent thickening of the tunnel insulator due to the growth of a native oxide layer while exposed to an oxygen-containing atmosphere. The ubiquitous native silicon oxide on the surface of the monocrystalline silicon substrate may be optionally removed either before nitridation or after nitridation.

Abstract: An integrated circuit having PMOS, NMOS and NPN transistors is described for applications in which both digital and analog circuits are required. The integrated circuit is designed to allow standard CMOS cells to be used in the integrated circuit without redesign. A P+ substrate (48) is provided upon which a first P- epitaxy layer (46) is formed. N+ DUF regions (50,52) are provided for the PMOS and NPN transistors, respectively. The base region (68) is formed in an Nwell (58) by implantation and diffusion. Before diffusion, a nitride layer (70) is formed over the base (68) to provided an inert annealing thereof. The base diffusion and collector diffusion occurs before the CMOS channel stop and source/drain diffusions in order to prevent altering diffusion times for the MOS transistors.