Abstract: A switching system having input ports and output ports and comprising an input queued (IQ) switch with virtual channels. Typically, only one virtual channel can, at a given time, access a given output port. Typically, the IQ switch includes an arbiter apparatus that controls the input ports and output ports to ensure that an input port transmits at most one cell at a time, and/or that an output port receives a cell over only one virtual channel, and/or an output port receives at most one cell at a time.

Abstract: A switching system having input ports and output ports and comprising an input queued (IQ) switch with virtual channels. Typically, only one virtual channel can, at a given time, access a given output port. Typically, the IQ switch includes an arbiter apparatus that controls the input ports and output ports to ensure that an input port transmits at most one cell at a time, and/or that an output port receives a cell over only one virtual channel, and/or an output port receives at most one cell at a time.

Abstract: A switching system having input ports and output ports and comprising an input queued switch with virtual channels. Typically only one of these can, at a given time, access a given output port from among the output ports. Typically the input queued switch includes arbiter apparatus which controls the input ports and output ports to ensure that at least one input port, from among the input ports, transmits at most one cell at a time, and/or that at least one output port, from among the output ports, which receives a cell, receives that cell over only 1 virtual channel (VC) from among the virtual channels. The arbiter apparatus may function as a dispatch unit in which typically, at least one output port, from among the output ports, receives at most one cell at a time.