Patents by Inventor Anil S. Keshavamurthy

Anil S. Keshavamurthy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200250003
    Abstract: In one embodiment, an apparatus comprises a processor to: identify a workload comprising a plurality of tasks; generate a workload graph based on the workload, wherein the workload graph comprises information associated with the plurality of tasks; identify a device connectivity graph, wherein the device connectivity graph comprises device connectivity information associated with a plurality of processing devices; identify a privacy policy associated with the workload; identify privacy level information associated with the plurality of processing devices; identify a privacy constraint based on the privacy policy and the privacy level information; and determine a workload schedule, wherein the workload schedule comprises a mapping of the workload onto the plurality of processing devices, and wherein the workload schedule is determined based on the privacy constraint, the workload graph, and the device connectivity graph.
    Type: Application
    Filed: June 29, 2018
    Publication date: August 6, 2020
    Applicant: Intel Corporation
    Inventors: Shao-Wen Yang, Yen-Kuang Chen, Ragaad Mohammed Irsehid Altarawneh, Juan Pablo Munoz Chiabrando, Siew Wen Chin, Kushal Datta, Subramanya R. Dulloor, Julio C. Zamora Esquivel, Omar Ulises Florez Choque, Vishakha Gupta, Scott D. Hahn, Rameshkumar Illikkal, Nilesh Kumar Jain, Siti Khairuni Amalina Kamarol, Anil S. Keshavamurthy, Heng Kar Lau, Jonathan A. Lefman, Yiting Liao, Michael G. Millsap, Ibrahima J. Ndiour, Luis Carlos Maria Remis, Addicam V. Sanjay, Usman Sarwar, Eve M. Schooler, Ned M. Smith, Vallabhajosyula S. Somayazulu, Christina R. Strong, Omesh Tickoo, Srenivas Varadarajan, Jesús A. Cruz Vargas, Hassnaa Moustafa, Arun Raghunath, Katalin Klara Bartfai-Walcott, Maruti Gupta Hyde, Deepak S. Vembar, Jessica McCarthy
  • Patent number: 10146571
    Abstract: Techniques are described for providing processor-based dedicated fixed function hardware to perform runtime integrity measurements for detecting attacks on system supervisory software, such as a hypervisor or native Operating System (OS). The dedicated fixed function hardware is provided with memory addresses of the system supervisory software for monitoring. After obtaining the memory addresses and other information required to facilitate integrity monitoring, the dedicated fixed function hardware activates a lock-out to prevent reception of any additional information, such as information from a corrupted version of the system supervisory software. The dedicated fixed function hardware then automatically performs periodic integrity measurements of the system supervisory software. Upon detection of an integrity failure, the dedicated fixed function hardware uses out-of-band signaling to report that an integrity failure has occurred.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: December 4, 2018
    Assignee: Intel Corporation
    Inventors: Radhakrishna R K Hiremane, Anil S. Keshavamurthy
  • Patent number: 9852299
    Abstract: The present disclosure is directed to a protection scheme for remotely-stored data. A system may comprise, for example, at least one device including at least one virtual machine (VM) and a trusted execution environment (TEE). The TEE may include an encryption service to encrypt or decrypt data received from the at least one VM. In one embodiment, the at least one VM may include an encryption agent to interact with interfaces in the encryption service. For example, the encryption agent may register with the encryption service, at which time an encryption key corresponding to the at least one VM may be generated. After verifying the registration of the encryption agent, the encryption service may utilize the encryption key corresponding to the at least one VM to encrypt or decrypt data received from the encryption agent. The encryption service may then return the encrypted or decrypted data to the encryption agent.
    Type: Grant
    Filed: September 27, 2013
    Date of Patent: December 26, 2017
    Assignee: INTEL CORPORATION
    Inventors: Hariprasad Nellitheertha, Deepak S., Thanunathan Rangarajan, Anil S. Keshavamurthy
  • Publication number: 20170024238
    Abstract: Techniques are described for providing processor-based dedicated fixed function hardware to perform runtime integrity measurements for detecting attacks on system supervisory software, such as a hypervisor or native Operating System (OS). The dedicated fixed function hardware is provided with memory addresses of the system supervisory software for monitoring. After obtaining the memory addresses and other information required to facilitate integrity monitoring, the dedicated fixed function hardware activates a lock-out to prevent reception of any additional information, such as information from a corrupted version of the system supervisory software. The dedicated fixed function hardware then automatically performs periodic integrity measurements of the system supervisory software. Upon detection of an integrity failure, the dedicated fixed function hardware uses out-of-band signaling to report that an integrity failure has occurred.
    Type: Application
    Filed: June 7, 2016
    Publication date: January 26, 2017
    Inventors: Radhakrishna RK Hiremane, Anil S. Keshavamurthy
  • Patent number: 9361244
    Abstract: Techniques are described for providing processor-based dedicated fixed function hardware to perform runtime integrity measurements for detecting attacks on system supervisory software, such as a hypervisor or native Operating System (OS). The dedicated fixed function hardware is provided with memory addresses of the system supervisory software for monitoring. After obtaining the memory addresses and other information required to facilitate integrity monitoring, the dedicated fixed function hardware activates a lock-out to prevent reception of any additional information, such as information from a corrupted version of the system supervisory software. The dedicated fixed function hardware then automatically performs periodic integrity measurements of the system supervisory software. Upon detection of an integrity failure, the dedicated fixed function hardware uses out-of-band signaling to report that an integrity failure has occurred.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: June 7, 2016
    Assignee: Intel Corporation
    Inventors: Radhakrishna Hiremane, Anil S. Keshavamurthy
  • Patent number: 9323539
    Abstract: Methods and apparatus related to constructing a persistent file system from scattered persistent regions are described. In one embodiment, stored information in a storage unit corresponds to one or more persistent memory regions that are scattered amongst one or more non-volatile memory devices. The one or more persistent memory regions are byte addressable. Also, the one or more persistent memory regions are used to form a virtual contiguous region. Other embodiments are also disclosed and claimed.
    Type: Grant
    Filed: June 27, 2013
    Date of Patent: April 26, 2016
    Assignee: Intel Corporation
    Inventors: Anil S. Keshavamurthy, Murugasamy K. Nachimuthu, Mohan J. Kumar
  • Patent number: 9122780
    Abstract: Embodiments of apparatus, computer-implemented methods, systems, devices, and computer-readable media are described herein for tracking per-virtual machine (“VM”) resource usage independent of a virtual machine monitor (“VMM”). In various embodiments, a first logic unit may associate one or more virtual central processing units (“vCPUs”) operated by one or more physical processing units of a computing device with a first VM of a plurality of VMs operated by the computing device, and collect data about resources used by the one or more physical processing units to operate the one or more vCPUs associated with the first VM. In various embodiments, a second logic unit of the computing device may determine resource-usage by the first VM based on the collected data. In various embodiments, the first and second logic units may perform these functions independent of a VMM of the computing device.
    Type: Grant
    Filed: June 20, 2012
    Date of Patent: September 1, 2015
    Assignee: Intel Corporation
    Inventors: Mahesh S. Natu, Anil S. Keshavamurthy, Alberto J. Munoz, Tessil Thomas
  • Publication number: 20150220745
    Abstract: The present disclosure is directed to a protection scheme for remotely-stored data. A system may comprise, for example, at least one device including at least one virtual machine (VM) and a trusted execution environment (TEE). The TEE may include an encryption service to encrypt or decrypt data received from the at least one VM. In one embodiment, the at least one VM may include an encryption agent to interact with interfaces in the encryption service. For example, the encryption agent may register with the encryption service, at which time an encryption key corresponding to the at least one VM may be generated. After verifying the registration of the encryption agent, the encryption service may utilize the encryption key corresponding to the at least one VM to encrypt or decrypt data received from the encryption agent. The encryption service may then return the encrypted or decrypted data to the encryption agent.
    Type: Application
    Filed: September 27, 2013
    Publication date: August 6, 2015
    Inventors: Hariprasad Nellitheertha, Deepak S., Thanunathan Rangarajan, Anil S. Keshavamurthy
  • Patent number: 8751864
    Abstract: In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
    Type: Grant
    Filed: March 22, 2013
    Date of Patent: June 10, 2014
    Assignee: Intel Corporation
    Inventors: Robert C. Swanson, Mahesh S. Natu, Rahul Khanna, Murugasamy K. Nachimuthu, Sarathy Jayakumar, Anil S. Keshavamurthy, Narayan Ranganathan
  • Publication number: 20130346966
    Abstract: Embodiments of apparatus, computer-implemented methods, systems, devices, and computer-readable media are described herein for tracking per-virtual machine (“VM”) resource usage independent of a virtual machine monitor (“VMM”). In various embodiments, a first logic unit may associate one or more virtual central processing units (“vCPUs”) operated by one or more physical processing units of a computing device with a first VM of a plurality of VMs operated by the computing device, and collect data about resources used by the one or more physical processing units to operate the one or more vCPUs associated with the first VM. In various embodiments, a second logic unit of the computing device may determine resource-usage by the first VM based on the collected data. In various embodiments, the first and second logic units may perform these functions independent of a VMM of the computing device.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 26, 2013
    Inventors: Mahesh S. Natu, Anil S. Keshavamurthy, Alberto J. Munoz, Tessil Thomas
  • Publication number: 20130212426
    Abstract: In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
    Type: Application
    Filed: March 22, 2013
    Publication date: August 15, 2013
    Inventors: Robert C. Swanson, Mahesh S. Natu, Rahul Khanna, Murugasamy K. Nachimuthu, Sarathy Jayakumar, Anil S. Keshavamurthy, Narayan Ranganathan
  • Patent number: 8407516
    Abstract: In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
    Type: Grant
    Filed: December 23, 2009
    Date of Patent: March 26, 2013
    Assignee: Intel Corporation
    Inventors: Robert C. Swanson, Mahesh S. Natu, Rahul Khanna, Murugasamy K. Nachimuthu, Sarathy Jayakumar, Anil S. Keshavamurthy, Narayan Ranganathan
  • Publication number: 20110154104
    Abstract: In one embodiment, the present invention provides an ability to handle an error occurring during a memory migration operation in a high availability system. In addition, a method can be used to dynamically remap a memory page stored in a non-mirrored memory region of memory to a mirrored memory region. This dynamic remapping may be responsive to a determination that the memory page has been accessed more than a threshold number of times, indicating a criticality of information on the page. Other embodiments are described and claimed.
    Type: Application
    Filed: December 23, 2009
    Publication date: June 23, 2011
    Inventors: Robert C. Swanson, Mahesh S. Natu, Rahul Khanna, Murugasamy K. Nachimuthu, Sarathy Jayakumar, Anil S. Keshavamurthy, Narayan Ranganathan
  • Patent number: 7437738
    Abstract: Provided are a method, system, and program for interfacing with device hardware supporting a plurality of devices. A device interface driver is initialized to represent the device hardware as a virtual bus to an operating system and to represent to the operating system each device supported in the device hardware as a device attached to the virtual bus. The device hardware is initialized and accessed to determine devices supported by the device hardware. One device object is generated for each determined device supported by the device hardware, wherein each generated device object represents the determined device to the operating system. The determined devices are reported to the operating system, wherein the operating system loads a device driver for each of the reported devices supported by the device hardware.
    Type: Grant
    Filed: November 12, 2003
    Date of Patent: October 14, 2008
    Assignee: Intel Corporation
    Inventors: Rajesh Shah, Anil S. Keshavamurthy