Abstract: In a described example, an apparatus includes: a first package substrate having a die mount surface; a semiconductor die flip chip mounted to the first package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the semiconductor die having solder bumps, wherein the solder bumps form solder joints to the package substrate; a second package substrate having a thermal pad positioned with the thermal pad over a backside surface of the semiconductor die, the thermal pad comprising a thermally conductive material; and a mold compound covering a portion of the first package substrate, a portion of the second package substrate, the semiconductor die, and the post connects, thermal pad having a surface exposed from the mold compound.

Abstract: A semiconductor package including a leadframe has a plurality of leads, and a semiconductor die including bond pads attached to the leadframe with the bond pads electrically coupled to the plurality of leads. The semiconductor die includes a substrate having a semiconductor surface including circuitry having nodes coupled to the bond pads. A mold compound encapsulates the semiconductor die. The mold compound is interdigitated having alternating extended mold regions over the plurality of leads and recessed mold regions in between adjacent ones of the plurality of leads.

Abstract: A semiconductor package includes a metallic pad and leads, a semiconductor die attached to the metallic pad, the semiconductor die including an active side with bond pads opposite the metallic pad, a wire bond extending from a respective bond pad of the semiconductor die to a respective lead of the leads, a heat spreader over the active side of the semiconductor die with a gap separating the active side of the semiconductor die from the heat spreader, an electrically insulating material within the gap and in contact with the active side of the semiconductor die and the heat spreader; and mold compound covering the semiconductor die and the wire bond, and partially covering the metallic pad and the heat spreader, with the metallic pad exposed on a first outer surface of the semiconductor package and with the heat spreader exposed on a second outer surface of the semiconductor package.

Abstract: In a described example, an apparatus includes: a semiconductor device mounted to a device side surface of a package substrate, the package substrate having a board side surface opposite the device side surface; an antenna module mounted to the package substrate and coupled to the semiconductor device; and mold compound covering the semiconductor device and a portion of the package substrate.

Abstract: In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

Abstract: A semiconductor package includes a package substrate having a top surface including traces and bonding features. There is at least one semiconductor die including a substrate having a semiconductor surface including circuitry electrically connected to bond pads mounted on the bonding features, and at least one inductor coil mounted with a first contact and a second contact that are positioned on the bonding features beyond the semiconductor die including a portion of the inductor over the semiconductor die. There is a dielectric coating on and within the inductor coil, on the semiconductor die, on the traces, and on the bonding features. A magnetic mold compound having magnetic particles and a dielectric material encapsulates the semiconductor die, the inductor, and the dielectric coating.

Abstract: An integrated circuit package includes a die attach pad (DAP) having a top surface and a layer of insulating material applied to the top surface of the DAP. A silicon-on-insulator (SOI) device is mounted on the insulating material using a die attach paste or film. A plurality of leads are coupled to the SOI device using bond wires. A mold compound covers at least a portion of the DAP and the SOI device. The insulating material may be polyimide or polyamide-imide that has been inkjet printed or screen printed on the DAP. The insulating material may be a parylene material that is applied to the top surface of the DAP using chemical vapor deposition. The insulating material has a thickness of 1-25 um and has a breakdown voltage of approximately 250V/um.

Abstract: In some examples, a semiconductor package comprises a semiconductor die including a device side having a circuit; a mold compound covering the semiconductor die and the circuit; a first lead coupled to the circuit, the first lead having a gullwing shape and emerging from the mold compound in a first horizontal plane, the first lead having a distal end coincident with a second horizontal plane lower than a bottom surface of the mold compound; and a second lead coupled to the circuit, the second lead emerging from the mold compound in the first horizontal plane, the second lead having a distal end coincident with a third horizontal plane higher than a topmost surface of the mold compound, the distal end of the second lead vertically coincident with the mold compound.

Abstract: One example includes a method for fabricating an integrated circuit (IC) device. The method includes fabricating a semiconductor die comprising an IC. The method also includes patterning a film over a portion of the first surface of the semiconductor die. The method also includes attaching a second surface of the semiconductor die opposite the first surface to a substrate. The method further includes depositing molding material over the semiconductor die to cover at least the first surface of the semiconductor die.

Abstract: In examples, a device comprises a semiconductor die, a thin-film layer, and an air cavity positioned between the semiconductor die and the thin-film layer. The air cavity comprises a resonator positioned on the semiconductor die. A rib couples to a surface of the thin-film layer opposite the air cavity.

Abstract: A semiconductor package including a leadframe has a plurality of leads, and a semiconductor die including bond pads attached to the leadframe with the bond pads electrically coupled to the plurality of leads. The semiconductor die includes a substrate having a semiconductor surface including circuitry having nodes coupled to the bond pads. A mold compound encapsulates the semiconductor die. The mold compound is interdigitated having alternating extended mold regions over the plurality of leads and recessed mold regions in between adjacent ones of the plurality of leads.

Abstract: A described example includes: a package substrate having a die pad with a die side surface and having an opposite backside surface, having leads arranged along two opposite sides and having die pad straps extending from two opposing ends of the die pad. The leads lie in a first plane, a portion of the die pad straps lie in a second plane that is spaced from the first plane and located closer to the die pad, and the die pad lies in a third plane that is spaced from and parallel to the second plane in a direction away from the first plane. A semiconductor die is mounted to the die side surface and mold compound covers the semiconductor die, a portion of the leads, and the die side surface of the die pad, and the backside surface of the die pad exposed from the mold compound.

Abstract: A described example includes: a MEMS component on a device side surface of a first semiconductor substrate; a second semiconductor substrate bonded to the device side surface of the first semiconductor substrate by a first seal patterned to form sidewalls that surround the MEMS component; a third semiconductor substrate having a second seal extending from a surface and bonded to the backside surface of the first semiconductor substrate by the second seal, the second seal forming sidewalls of a gap beneath the MEMS component. A trench extends through the first semiconductor substrate and at least partially surrounds the MEMS component. The third semiconductor substrate is mounted on a package substrate. A bond wire or ribbon bond couples the bond pad to a conductive lead on the package substrate; and mold compound covers the MEMS component, the bond wire, and a portion of the package substrate.

Abstract: In a described example, an apparatus includes: a package substrate having a die mount surface; semiconductor die flip chip mounted to the package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the active surface of the semiconductor die and connected to the package substrate by solder joints; a thermal interposer comprising a thermally conductive material positioned over and in thermal contact with a backside surface of the semiconductor die; and mold compound covering a portion of the package substrate, a portion of the thermal interposer, the semiconductor die, and the post connects, the thermal interposer having a surface exposed from the mold compound.

Abstract: In examples, a package comprises a semiconductor die having a device side and a bond pad on the device side, a conductive terminal exposed to an exterior of the package, and an electrical fuse. The electrical fuse comprises a conductive ball coupled to the bond pad, and a bond wire coupled to the conductive terminal. The bond wire is stitch-bonded to the conductive ball.

Abstract: In a described example, an apparatus includes: a first semiconductor die with a component on a first surface; a second semiconductor die mounted on a package substrate and having a third surface facing away from the package substrate; a solder seal bonded to and extending from the first surface of the first semiconductor die flip chip mounted to the third surface of the second semiconductor die, the solder seal at least partially surrounding the stress sensitive component; a first solder joint formed between the solder seal and the third surface of the second semiconductor die; a second solder joint formed between solder at an end of the post connect and the third surface of the second semiconductor die; and a mold compound covering the second surface of the first semiconductor die, a portion of the second semiconductor die, and an outside periphery of the solder seal.

Abstract: In a described example, an apparatus includes: a first package substrate having a die mount surface; a semiconductor die flip chip mounted to the first package substrate on the die mount surface, the semiconductor die having post connects having proximate ends on bond pads on an active surface of the semiconductor die, and extending to distal ends away from the semiconductor die having solder bumps, wherein the solder bumps form solder joints to the package substrate; a second package substrate having a thermal pad positioned with the thermal pad over a backside surface of the semiconductor die, the thermal pad comprising a thermally conductive material; and a mold compound covering a portion of the first package substrate, a portion of the second package substrate, the semiconductor die, and the post connects, thermal pad having a surface exposed from the mold compound.

Abstract: A semiconductor package includes a leadframe, a semiconductor die attached to the leadframe, and a passive component electrically connected to the semiconductor die through the leadframe. The leadframe includes a cavity in a side of the leadframe opposite the semiconductor die, and at least a portion of the passive component resides within the cavity in a stacked arrangement.

Abstract: Electronic packages and related methods are disclosed. An example electronic package apparatus includes a substrate and an electronic component. A protective material is positioned on a first surface, a second surface and all side surfaces of the electronic component to encase the electronic component. An enclosure is coupled to the substrate to cover the protective material and the electronic component.

Abstract: A microelectronic device has a pillar connected to an external terminal by an intermetallic joint. Either the pillar or the external terminal, or both, include copper in direct contact with the intermetallic joint. The intermetallic joint includes at least 90 weight percent of at least one copper-tin intermetallic compound. The intermetallic joint is free of voids having a combined volume greater than 10 percent of a volume of the intermetallic joint; and free of a void having a volume greater than 5 percent of the volume of the intermetallic joint. The microelectronic device may be formed using solder which includes at least 93 weight percent tin, 0.5 weight percent to 5.0 weight percent silver, and 0.4 weight percent to 1.0 weight percent copper, to form a solder joint between the pillar and the external terminal, followed by thermal aging to convert the solder joint to the intermetallic joint.