Abstract: Systems and methods are provided for presenting selectable page navigation options representing topics or search queries determined to be relevant to an item that a user is viewing on an initial page. When a user selects to begin entering a search query in a search filed on the initial page, a system may determine two or more page destinations to recommend to the user based on the first item presented on the initial page, where the page destinations may each represent a different topic or search query. These recommended destinations may then be presented over at least a portion of the initial page near the search field as selectable options for navigating to a corresponding recommended page destination. The selectable options may include, for each recommended page destination, an image representing the page destination and text identifying the page destination.

Abstract: A parcel shelf for a vehicle includes a tray disposed between a trunk area and a cabin area of the vehicle and a soundproofing partition extending laterally between two distal portions of the tray such that the tray is partitioned into a forward region and a rearward region. The forward region includes openings and each of these openings is sealed to limit passage of sound from the trunk area into the cabin area through the forward region. The soundproofing partition is configured such that the sound from the trunk area reaching the rearward region is redirected along an extended sound pathway before entering the cabin area. A resulting sound level entering the cabin area is reduced below a defined threshold level.

Abstract: A parcel shelf for a vehicle includes a tray disposed between a trunk area and a cabin area of the vehicle and a soundproofing partition extending laterally between two distal portions of the tray such that the tray is partitioned into a forward region and a rearward region. The forward region includes openings and each of these openings is sealed to limit passage of sound from the trunk area into the cabin area through the forward region. The soundproofing partition is configured such that the sound from the trunk area reaching the rearward region is redirected along an extended sound pathway before entering the cabin area. A resulting sound level entering the cabin area is reduced below a defined threshold level.

Abstract: The present invention discloses the procedure for obtaining complete spectrum of the Nadi pulses, as a time series and capable of detecting the major types and the subtypes of the Nadi pulses. The device of this invention involves three diaphragm elements equipped with strain gauge, three transmitters cum amplifiers, and a digitizer for quantifying analog signal. The system acquires the data with 12-bit accuracy with practically no electronic and/or external interfering noise. The pertaining proofs are given which clearly shows the capability of delivering the accurate spectrums, with repeatability of the pulses from the invented system. ‘Nadi-Nidan’ is a prominent method in Ayurveda (Ayurveda is a Sanskrit word derived from ‘Ayus’ and ‘vid’, meaning life and knowledge respectively. It is a holistic science encompassing mental, physical and spiritual health), which is known to dictate all the salient features of a human body.

Abstract: A system to monitor performance of a computing device includes a first bridge to interface with a first set of devices, and a second bridge to interface with a second set of devices. Configuration registers store configuration data associated with the second set of devices, and are accessible through the second bridge. A hub interface allows data to transfer downstream from the first bridge to the second bridge, and allows data to transfer upstream from the second bridge to the first bridge. A controller, external to the first and second bridges, accesses the configuration registers via the second bridge. A logic device allows the second bridge to send data to, and receive data from, the controller.

Abstract: A system and method are disclosed for using standard issue synchronous optical network (SONET) framers to comply with current automatic protection system (APS) standards. Each standard framer includes its own section, line, and path layer termination. The working set of lines and protection set of lines of the APS system are switched after the path layer rather than before. A firmware solution allows for a proper use of various error indication signals.

Abstract: Access to internal configuration registers on a computer system's chipset using an external micro-controller is provided. A SMB configuration read command including a register address may be received from an external micro-controller. Access to an internal bus may be requested from a bus arbiter. If internal bus access is granted, the SMB configuration read command may be forwarded to a device including the identified register address using the internal bus. In response to the SMB configuration read command, configuration register values from the device may be received. The configuration register values may be forwarded to the external micro-controller.

Abstract: A method, apparatus, and system are disclosed. In one embodiment the method comprises detecting a temperature event in a processor and modifying bus frequency of a bus coupled to the processor in response to the temperature event.

Abstract: In some embodiments, a method and apparatus for maintaining data integrity following parity error detection are described. In one embodiment, the method includes the blockage of bus transactions in response to detection of a parity error. Once bus transactions are suspended, a parity error handler routine is invoked to perform parity error recovery according to stored transaction information regarding an error bus transaction of the detected parity error. In one embodiment, the stored information includes a bus master that caused the error, as well as an address associated with the corrupt data for which the parity error was asserted. In one embodiment, data logging is performed to track the bus masters associated with error bus transactions to enable identification of problematic or old hardware devices. Other embodiments are described and claims.

Abstract: Method and apparatus for supporting multi-function PCI devices in PCI bridges. Respective pre-fetch buffers are allocated in response to respective initial data transfer requests issued by a multi-function PCI device. A programmable buffer fill watermark is set up for each pre-fetch buffer. While a portion of data corresponding to the data transfer requests fill the pre-fetch buffers, the fill level of each buffer is monitored to determine if it meets or exceeds its buffer fill watermark. In response to such a condition, the multi-function PCI device is connected to the PCI bridge and a virtual buffer is mapped to the pre-fetch buffer. The pre-fetch buffer is then emptied. During subsequent data transfers, each of the pre-fetch buffer becomes filled, the PCI device is connected, and the virtual buffer is mapped to the filled buffer. The process is continued until all data corresponding to the original data transfer request is received by the multi-function PCI device.

Abstract: Embodiments of the invention provide a status register for each channel of a DMA controller. The status register may be used to monitor and record events that occur during DMA data transfers, including timeouts and aborts.

Abstract: An improved gate structure for a MOSFET device exhibits a reduced level of 1/f noise or “flicker noise”, while maintaining the control of boron penetration into the substrate of the MOSFET device. The gate structure for the MOSFET device includes a gate electrode and a gate oxide layer wherein nitrogen is selectively implanted into the gate oxide/device substrate interface prior to oxidation of the gate oxide layer. The nitrogen is selectively implanted so that the nitrogen is implanted into thin gate oxide regions and masked from thick gate oxide regions so that the benefits of controlling the boron penetration are realized while the 1/f noise is reduced due to the selective implantation of the nitrogen.

Abstract: Embodiments of the invention provide a status register for each channel of a DMA controller. The status register may be used to monitor and record events that occur during DMA data transfers, including timeouts and aborts.

Abstract: An improved gate structure for a MOSFET device exhibits a reduced level of 1/f noise or “flicker noise”, while maintaining the control of boron penetration into the substrate of the MOSFET device. The gate structure for the MOSFET device includes a gate electrode and a gate oxide layer wherein nitrogen is selectively implanted into the gate oxide/device substrate interface prior to oxidation of the gate oxide layer. The nitrogen is selectively implanted so that the nitrogen is implanted into thin gate oxide regions and masked from thick gate oxide regions so that the benefits of controlling the boron penetration are realized while the 1/f noise is reduced due to the selective implantation of the nitrogen.

Abstract: An improved gate structure for a MOSFET device exhibits a reduced level of 1/f noise or “flicker noise”, while maintaining the control of boron penetration into the substrate of the MOSFET device. The gate structure for the MOSFET device includes a gate electrode and a gate oxide layer wherein nitrogen is selectively implanted into the gate oxide/device substrate interface prior to oxidation of the gate oxide layer. The nitrogen is selectively implanted so that the nitrogen is implanted into thin gate oxide regions and masked from thick gate oxide regions so that the benefits of controlling the boron penetration are realized while the 1/f noise is reduced due to the selective implantation of the nitrogen.