Patents by Inventor Anirudh Rajendra Acharya

Anirudh Rajendra Acharya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11900499
    Abstract: A technique for executing commands for an accelerated processing device is provided. The technique includes obtaining an iteration number and predication data from metadata for an iterative indirect command buffer; for each iteration indicated by the iteration number, performing commands of the iterative indirect command buffer as specified by the predication data; and ending processing of the iterative indirect command buffer in response to processing a number of iterations equal to the iteration number.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: February 13, 2024
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Anirudh Rajendra Acharya, Ruijin Wu, Alexander Fuad Ashkar, Harry J. Wise
  • Publication number: 20210304349
    Abstract: A technique for executing commands for an accelerated processing device is provided. The technique includes obtaining an iteration number and predication data from metadata for an iterative indirect command buffer; for each iteration indicated by the iteration number, performing commands of the iterative indirect command buffer as specified by the predication data; and ending processing of the iterative indirect command buffer in response to processing a number of iterations equal to the iteration number.
    Type: Application
    Filed: September 22, 2020
    Publication date: September 30, 2021
    Applicant: Advanced Micro Devices, Inc.
    Inventors: Anirudh Rajendra Acharya, Ruijin Wu, Alexander Fuad Ashkar, Harry J. Wise
  • Patent number: 10297003
    Abstract: This disclosure describes techniques for context switching. In one example, a graphics processing unit may be configured to generate one or more signatures for context information stored in on-chip memory of the graphics processing unit, determine whether the one or more signatures match any previously generated signatures for context information stored in one or more memories accessible by the graphics processing unit, store, to at least one of the one or more memories, any signature of the one or more signatures that is determined not to match any previously generated signature stored in at least one of the one or more memories, and store, to at least one of the one or more memories, the context information respectively corresponding to the one or more signatures determined not to match any previously generated signature stored in at least one of the one or more memories.
    Type: Grant
    Filed: September 21, 2015
    Date of Patent: May 21, 2019
    Assignee: QUALCOMM Incorporated
    Inventor: Anirudh Rajendra Acharya
  • Patent number: 10210593
    Abstract: A graphics processing unit (GPU) may dispatch a first set of commands for execution on one or more processing units of the GPU. The GPU may receive notification from a host device indicating that a second set of commands are ready to execute on the GPU. In response, the GPU may issue a first preemption command at a first preemption granularity to the one or more processing units. In response to the GPU failing to preempt execution of the first set of commands within an elapsed time period after issuing the first preemption command, the GPU may issue a second preemption command at a second preemption granularity to the one or more processing units, where the second preemption granularity is finer-grained than the first preemption granularity.
    Type: Grant
    Filed: January 28, 2016
    Date of Patent: February 19, 2019
    Assignee: QUALCOMM Incorporated
    Inventors: Anirudh Rajendra Acharya, Alexei Vladimirovich Bourd, David Rigel Garcia Garcia, Milind Nilkanth Nemlekar, Vineet Goel
  • Patent number: 10134103
    Abstract: A method of data processing, the method comprising receiving, at a graphics processing unit (GPU), a command stream, the command stream including one or more commands to be performed by the GPU and at least one command stream marker, the at least one command stream marker indicating a workload type of the command stream, determining, by the GPU, an operation algorithm for the GPU based on the at least one command stream marker prior to executing the command stream, and executing, by the GPU, the command stream based on the operation algorithm.
    Type: Grant
    Filed: March 29, 2016
    Date of Patent: November 20, 2018
    Assignee: QUALCOMM Incorporated
    Inventors: Anirudh Rajendra Acharya, David Rigel Garcia Garcia, Nigel Terence Poole
  • Patent number: 9842376
    Abstract: Techniques are described with respect to preemption in which a graphics processing unit (GPU) may execute a first set of commands in response to receiving a draw call, the draw call defining a plurality of primitives that are to be rendered by the first set of commands, receive a preemption notification during execution of the first set of commands, and preempt the execution of the first set of commands, prior to completing the execution of the first set of commands to render the plurality of primitives of the draw call, for executing a second set of commands.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: December 12, 2017
    Assignee: QUALCOMM Incorporated
    Inventors: Anirudh Rajendra Acharya, Gang Zhong, Vineet Goel
  • Publication number: 20170221173
    Abstract: A graphics processing unit (GPU) may dispatch a first set of commands for execution on one or more processing units of the GPU. The GPU may receive notification from a host device indicating that a second set of commands are ready to execute on the GPU. In response, the GPU may issue a first preemption command at a first preemption granularity to the one or more processing units. In response to the GPU failing to preempt execution of the first set of commands within an elapsed time period after issuing the first preemption command, the GPU may issue a second preemption command at a second preemption granularity to the one or more processing units, where the second preemption granularity is finer-grained than the first preemption granularity.
    Type: Application
    Filed: January 28, 2016
    Publication date: August 3, 2017
    Inventors: Anirudh Rajendra Acharya, Alexei Vladimirovich Bourd, David Rigel Garcia Garcia, Milind Nilkanth Nemlekar, Vineet Goel
  • Publication number: 20170116701
    Abstract: A method of data processing, the method comprising receiving, at a graphics processing unit (GPU), a command stream, the command stream including one or more commands to be performed by the GPU and at least one command stream marker, the at least one command stream marker indicating a workload type of the command stream, determining, by the GPU, an operation algorithm for the GPU based on the at least one command stream marker prior to executing the command stream, and executing, by the GPU, the command stream based on the operation algorithm.
    Type: Application
    Filed: March 29, 2016
    Publication date: April 27, 2017
    Inventors: Anirudh Rajendra Acharya, David Rigel Garcia Garcia, Nigel Terence Poole
  • Patent number: 9626313
    Abstract: A command processor may process a command stream for execution by at least one processor, including storing data associated with a first set of one or more operations in the command stream in a trace buffer, wherein the first set of one or more operations accesses one or more memory locations in memory, and wherein the data include an indication of contents of the one or more memory locations associated with the first set of one or more operations. The command processor may interrupt the processing of the command stream. The command processor may, in response to resuming processing of the command stream subsequent to the interrupting of the processing of the command stream, replay at least a portion of the command stream, including processing a second set of one or more operations of the command stream based at least in part on the data stored in the trace buffer.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: April 18, 2017
    Assignee: QUALCOMM Incorporated
    Inventor: Anirudh Rajendra Acharya
  • Publication number: 20170091895
    Abstract: Techniques are described with respect to preemption in which a graphics processing unit (GPU) may execute a first set of commands in response to receiving a draw call, the draw call defining a plurality of primitives that are to be rendered by the first set of commands, receive a preemption notification during execution of the first set of commands, and preempt the execution of the first set of commands, prior to completing the execution of the first set of commands to render the plurality of primitives of the draw call, for executing a second set of commands.
    Type: Application
    Filed: February 2, 2016
    Publication date: March 30, 2017
    Inventors: Anirudh Rajendra Acharya, Gang Zhong, Vineet Goel
  • Publication number: 20170083998
    Abstract: This disclosure describes techniques for context switching. In one example, a graphics processing unit may be configured to generate one or more signatures for context information stored in on-chip memory of the graphics processing unit, determine whether the one or more signatures match any previously generated signatures for context information stored in one or more memories accessible by the graphics processing unit, store, to at least one of the one or more memories, any signature of the one or more signatures that is determined not to match any previously generated signature stored in at least one of the one or more memories, and store, to at least one of the one or more memories, the context information respectively corresponding to the one or more signatures determined not to match any previously generated signature stored in at least one of the one or more memories.
    Type: Application
    Filed: September 21, 2015
    Publication date: March 23, 2017
    Inventor: Anirudh Rajendra Acharya
  • Publication number: 20160179714
    Abstract: A command processor may process a command stream for execution by at least one processor, including storing data associated with a first set of one or more operations in the command stream in a trace buffer, wherein the first set of one or more operations accesses one or more memory locations in memory, and wherein the data include an indication of contents of the one or more memory locations associated with the first set of one or more operations. The command processor may interrupt the processing of the command stream. The command processor may, in response to resuming processing of the command stream subsequent to the interrupting of the processing of the command stream, replay at least a portion of the command stream, including processing a second set of one or more operations of the command stream based at least in part on the data stored in the trace buffer.
    Type: Application
    Filed: December 18, 2014
    Publication date: June 23, 2016
    Inventor: Anirudh Rajendra Acharya