Patents by Inventor Anish Reghunath
Anish Reghunath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12111778Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.Type: GrantFiled: December 21, 2021Date of Patent: October 8, 2024Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Mihir Mody, Niraj Nandan, Hetul Sanghvi, Brian Chae, Rajasekhar Reddy Allu, Jason A. T. Jones, Anthony Lell, Anish Reghunath
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Patent number: 11962953Abstract: Systems and methods are provided for transmitting functional safety statistics within a system. A video source produces a video data stream. A functional safety system driver accumulates functional safety statistics from at least one system and writes the functional safety statistics onto an associated system memory. A display sub-system driver writes a frame of the video data stream to the system memory. The display sub-system driver formats the functional safety statistics as video data and appends the functional safety statistics to a portion of the frame of video that is reserved for the functional safety statistics. A display sub-system transmits the frame of the video data stream to a host processor, which extracts the functional safety statistics from the video frame.Type: GrantFiled: March 8, 2021Date of Patent: April 16, 2024Assignee: Texas Instruments IncorporatedInventors: Brijesh Rameshbhai Jadav, Shiju Ozhuvinamolathu Sivasankaran, Anish Reghunath
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Patent number: 11947477Abstract: A system includes a display subsystem. The display subsystem includes a shared buffer having allocated portions, each allocated to one of a plurality of display threads, each display thread associated with a display peripheral. The display subsystem also includes a direct memory access (DMA) engine configured to receive a request from a main processor to deallocate an amount of space from a first allocated portion associated with a first display thread. In response to receiving the request, the DMA engine deallocates the amount of space from the first allocated portion and shifts the allocated portions of at least some of other display threads to maintain contiguity of the allocated portions and concatenate free space at an end of the shared buffer.Type: GrantFiled: August 15, 2022Date of Patent: April 2, 2024Assignee: Texas Instruments IncorporatedInventors: Anish Reghunath, Brian Chae, Jay Scott Salinger, Chunheng Luo
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Patent number: 11682212Abstract: A computer vision system is provided that includes an image generation device configured to capture consecutive two dimensional (2D) images of a scene, a first memory configured to store the consecutive 2D images, a second memory configured to store a growing window of consecutive rows of a reference image and a growing window of consecutive rows of a current image, wherein the reference image and the current image are a pair of consecutive 2D images stored in the first memory, a third memory configured to store a sliding window of pixels fetched from the growing window of the reference image, wherein the pixels in the sliding window are stored in tiles, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for the pair of consecutive 2D images, wherein the DOFE uses the sliding window as a search window for pixel correspondence searches.Type: GrantFiled: November 2, 2020Date of Patent: June 20, 2023Assignee: Texas Instruments IncorporatedInventors: Hetul Sanghvi, Mihir Narendra Mody, Niraj Nandan, Anish Reghunath, Michael Peter Lachmayr
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Patent number: 11620757Abstract: A computer vision system is provided that includes an image generation device configured to generate consecutive two dimensional (2D) images of a scene, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for pairs of the consecutive 2D images, wherein, for a pair of consecutive 2D images, the DOFE is configured to perform a predictor based correspondence search for each paxel in a current image of the pair of consecutive 2D images, wherein, for an anchor pixel in each paxel, the predictor based correspondence search evaluates a plurality of predictors to select a best matching pixel in a reference image of the pair of consecutive 2D images, and determine optical flow vectors for each pixel in a paxel based on the best matching pixel selected for the anchor pixel of the paxel.Type: GrantFiled: November 23, 2021Date of Patent: April 4, 2023Assignee: Texas Instruments IncorporatedInventors: Hetul Sanghvi, Mihir Narendra Mody, Niraj Nandan, Anish Reghunath, Michael Peter Lachmayr
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Publication number: 20220391338Abstract: A system includes a display subsystem. The display subsystem includes a shared buffer having allocated portions, each allocated to one of a plurality of display threads, each display thread associated with a display peripheral. The display subsystem also includes a direct memory access (DMA) engine configured to receive a request from a main processor to deallocate an amount of space from a first allocated portion associated with a first display thread. In response to receiving the request, the DMA engine deallocates the amount of space from the first allocated portion and shifts the allocated portions of at least some of other display threads to maintain contiguity of the allocated portions and concatenate free space at an end of the shared buffer.Type: ApplicationFiled: August 15, 2022Publication date: December 8, 2022Inventors: Anish Reghunath, Brian Chae, Jay Scott Salinger, Chunheng Luo
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Patent number: 11436171Abstract: A system includes a display subsystem. The display subsystem includes a shared buffer having allocated portions, each allocated to one of a plurality of display threads, each display thread associated with a display peripheral. The display subsystem also includes a direct memory access (DMA) engine configured to receive a request from a main processor to deallocate an amount of space from a first allocated portion associated with a first display thread. In response to receiving the request, the DMA engine deallocates the amount of space from the first allocated portion and shifts the allocated portions of at least some of other display threads to maintain contiguity of the allocated portions and concatenate free space at an end of the shared buffer.Type: GrantFiled: December 5, 2019Date of Patent: September 6, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Anish Reghunath, Brian Chae, Jay Scott Salinger, Chunheng Luo
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Publication number: 20220114120Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.Type: ApplicationFiled: December 21, 2021Publication date: April 14, 2022Inventors: Mihir MODY, Niraj NANDAN, Hetul SANGHVI, Brian CHAE, Rajasekhar Reddy ALLU, Jason A.T. JONES, Anthony LELL, Anish REGHUNATH
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Publication number: 20220084215Abstract: A computer vision system is provided that includes an image generation device configured to generate consecutive two dimensional (2D) images of a scene, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for pairs of the consecutive 2D images, wherein, for a pair of consecutive 2D images, the DOFE is configured to perform a predictor based correspondence search for each paxel in a current image of the pair of consecutive 2D images, wherein, for an anchor pixel in each paxel, the predictor based correspondence search evaluates a plurality of predictors to select a best matching pixel in a reference image of the pair of consecutive 2D images, and determine optical flow vectors for each pixel in a paxel based on the best matching pixel selected for the anchor pixel of the paxel.Type: ApplicationFiled: November 23, 2021Publication date: March 17, 2022Inventors: Hetul Sanghvi, Mihir Narendra Mody, Niraj Nandan, Anish Reghunath, Michael Peter Lachmayr
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Patent number: 11237991Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.Type: GrantFiled: August 17, 2020Date of Patent: February 1, 2022Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Mihir Mody, Niraj Nandan, Hetul Sanghvi, Brian Chae, Rajasekhar Reddy Allu, Jason A. T. Jones, Anthony Lell, Anish Reghunath
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Patent number: 11182908Abstract: A computer vision system is provided that includes an image generation device configured to generate consecutive two dimensional (2D) images of a scene, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for pairs of the consecutive 2D images, wherein, for a pair of consecutive 2D images, the DOFE is configured to perform a predictor based correspondence search for each paxel in a current image of the pair of consecutive 2D images, wherein, for an anchor pixel in each paxel, the predictor based correspondence search evaluates a plurality of predictors to select a best matching pixel in a reference image of the pair of consecutive 2D images, and determine optical flow vectors for each pixel in a paxel based on the best matching pixel selected for the anchor pixel of the paxel.Type: GrantFiled: September 27, 2019Date of Patent: November 23, 2021Assignee: Texas Instruments IncorporatedInventors: Hetul Sanghvi, Mihir Narendra Mody, Niraj Nandan, Anish Reghunath, Michael Peter Lachmayr
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Publication number: 20210195156Abstract: Systems and methods are provided for transmitting functional safety statistics within a system. A video source produces a video data stream. A functional safety system driver accumulates functional safety statistics from at least one system and writes the functional safety statistics onto an associated system memory. A display sub-system driver writes a frame of the video data stream to the system memory. The display sub-system driver formats the functional safety statistics as video data and appends the functional safety statistics to a portion of the frame of video that is reserved for the functional safety statistics. A display sub-system transmits the frame of the video data stream to a host processor, which extracts the functional safety statistics from the video frame.Type: ApplicationFiled: March 8, 2021Publication date: June 24, 2021Inventors: Brijesh Rameshbhai Jadav, Shiju Ozhuvinamolathu Sivasankaran, Anish Reghunath
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Patent number: 10944950Abstract: Systems and methods are provided for transmitting functional safety statistics within a system. A video source produces a video data stream. A functional safety system driver accumulates functional safety statistics from at least one system and writes the functional safety statistics onto an associated system memory. A display sub-system driver writes a frame of the video data stream to the system memory. The display sub-system driver formats the functional safety statistics as video data and appends the functional safety statistics to a portion of the frame of video that is reserved for the functional safety statistics. A display sub-system transmits the frame of the video data stream to a host processor, which extracts the functional safety statistics from the video frame.Type: GrantFiled: December 21, 2017Date of Patent: March 9, 2021Assignee: Texas Instruments IncorporatedInventors: Brijesh Rameshbhai Jadav, Shiju Ozhuvinamolathu Sivasankaran, Anish Reghunath
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Publication number: 20210049368Abstract: A computer vision system is provided that includes an image generation device configured to capture consecutive two dimensional (2D) images of a scene, a first memory configured to store the consecutive 2D images, a second memory configured to store a growing window of consecutive rows of a reference image and a growing window of consecutive rows of a current image, wherein the reference image and the current image are a pair of consecutive 2D images stored in the first memory, a third memory configured to store a sliding window of pixels fetched from the growing window of the reference image, wherein the pixels in the sliding window are stored in tiles, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for the pair of consecutive 2D images, wherein the DOFE uses the sliding window as a search window for pixel correspondence searches.Type: ApplicationFiled: November 2, 2020Publication date: February 18, 2021Inventors: Hetul Sanghvi, Mihir Narendra Mody, Niraj Nandan, Anish Reghunath, Michael Peter Lachmayr
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Publication number: 20200379928Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.Type: ApplicationFiled: August 17, 2020Publication date: December 3, 2020Inventors: Mihir MODY, Niraj NANDAN, Hetul SANGHVI, Brian CHAE, Rajasekhar Reddy ALLU, Jason A.T. JONES, Anthony LELL, Anish REGHUNATH
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Patent number: 10824877Abstract: A computer vision system is provided that includes an image generation device configured to capture consecutive two dimensional (2D) images of a scene, a first memory configured to store the consecutive 2D images, a second memory configured to store a growing window of consecutive rows of a reference image and a growing window of consecutive rows of a current image, wherein the reference image and the current image are a pair of consecutive 2D images stored in the first memory, a third memory configured to store a sliding window of pixels fetched from the growing window of the reference image, wherein the pixels in the sliding window are stored in tiles, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for the pair of consecutive 2D images, wherein the DOFE uses the sliding window as a search window for pixel correspondence searches.Type: GrantFiled: June 29, 2017Date of Patent: November 3, 2020Assignee: Texas Instruments IncorporatedInventors: Hetul Sanghvi, Mihir Narendra Mody, Niraj Nandan, Anish Reghunath, Michael Peter Lachmayr
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Patent number: 10747692Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.Type: GrantFiled: December 27, 2018Date of Patent: August 18, 2020Assignee: TEXAS INSTRUMENTS INCORPORATEDInventors: Mihir Mody, Niraj Nandan, Hetul Sanghvi, Brian Chae, Rajasekhar Reddy Allu, Jason A. T. Jones, Anthony Lell, Anish Reghunath
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Publication number: 20200210360Abstract: A system includes a display subsystem. The display subsystem includes a shared buffer having allocated portions, each allocated to one of a plurality of display threads, each display thread associated with a display peripheral. The display subsystem also includes a direct memory access (DMA) engine configured to receive a request from a main processor to deallocate an amount of space from a first allocated portion associated with a first display thread. In response to receiving the request, the DMA engine deallocates the amount of space from the first allocated portion and shifts the allocated portions of at least some of other display threads to maintain contiguity of the allocated portions and concatenate free space at an end of the shared buffer.Type: ApplicationFiled: December 5, 2019Publication date: July 2, 2020Inventors: Anish Reghunath, Brian Chae, Jay Scott Salinger, Chunheng Luo
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Publication number: 20200210351Abstract: A processing accelerator includes a shared memory, and a stream accelerator, a memory-to-memory accelerator, and a common DMA controller coupled to the shared memory. The stream accelerator is configured to process a real-time data stream, and to store stream accelerator output data generated by processing the real-time data stream in the shared memory. The memory-to-memory accelerator is configured to retrieve input data from the shared memory, to process the input data, and to store, in the shared memory, memory-to-memory accelerator output data generated by processing the input data. The common DMA controller is configured to retrieve stream accelerator output data from the shared memory and transfer the stream accelerator output data to memory external to the processing accelerator; and to retrieve the memory-to-memory accelerator output data from the shared memory and transfer the memory-to-memory accelerator output data to memory external to the processing accelerator.Type: ApplicationFiled: December 27, 2018Publication date: July 2, 2020Inventors: Mihir MODY, Niraj NANDAN, Hetul SANGHVI, Brian CHAE, Rajasekhar Reddy ALLU, Jason A.T. JONES, Anthony LELL, Anish REGHUNATH
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Publication number: 20200027219Abstract: A computer vision system is provided that includes an image generation device configured to generate consecutive two dimensional (2D) images of a scene, and a dense optical flow engine (DOFE) configured to determine a dense optical flow map for pairs of the consecutive 2D images, wherein, for a pair of consecutive 2D images, the DOFE is configured to perform a predictor based correspondence search for each paxel in a current image of the pair of consecutive 2D images, wherein, for an anchor pixel in each paxel, the predictor based correspondence search evaluates a plurality of predictors to select a best matching pixel in a reference image of the pair of consecutive 2D images, and determine optical flow vectors for each pixel in a paxel based on the best matching pixel selected for the anchor pixel of the paxel.Type: ApplicationFiled: September 27, 2019Publication date: January 23, 2020Inventors: Hetul Sanghvi, Mihir Narendra Mody, Niraj Nandan, Anish Reghunath, Michael Peter Lachmayr