Patents by Inventor Anish T. Patel

Anish T. Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Verification of highly optimized synchronous pipelines via random simulation driven by critical resource scheduling system and program product
    Patent number: 7739633
    Abstract: Testing a model of a logic circuit model. The testing includes generating valid random input stimulus sequences for a logic circuit model. Enumerating critical resource requirements, enumerating critical resource availabilities does this, and selecting of stimulus sequences and determining legal times for execution of said stimulus sequences based on resource availability. This includes generating a plurality of possible combinations of input stimulus sequences and generating an array representation of critical resource requirements. These are used to generate an array representation of critical resources availabilities.
    Type: Grant
    Filed: March 6, 2008
    Date of Patent: June 15, 2010
    Assignee: International Business Machines Corporation
    Inventors: Faisal A. Ahmad, Kevin C. Gower, Anish T. Patel
  • Verification of Highly Optimized Synchronous Pipelines via Random Simulation Driven by Critical Resource Scheduling System and Program Product
    Publication number: 20090132221
    Abstract: Testing a model of a logic circuit model. The testing includes generating valid random input stimulus sequences for a logic circuit model. Enumerating critical resource requirements, enumerating critical resource availabilities does this, and selecting of stimulus sequences and determining legal times for execution of said stimulus sequences based on resource availability. This includes generating a plurality of possible combinations of input stimulus sequences and generating an array representation of critical resource requirements. These are used to generate an array representation of critical resources availabilities.
    Type: Application
    Filed: March 6, 2008
    Publication date: May 21, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Faisal Ahmad, Kevin C. Gower, Anish T. Patel
  • Design verification of highly optimized synchronous pipelines via random simulation driven by critical resource scheduling
    Patent number: 7426704
    Abstract: Testing a model of a logic circuit model. The testing includes generating valid random input stimulus sequences for a logic circuit model. Enumerating critical resource requirements, enumerating critical resource availabilities does this, and selecting of stimulus sequences and determining legal times for execution of said stimulus sequences based on resource availability. This includes generating a plurality of possible combinations of input stimulus sequences and generating an array representation of critical resource requirements. These are used to generate an array representation of critical resources availabilities.
    Type: Grant
    Filed: May 10, 2004
    Date of Patent: September 16, 2008
    Assignee: International Business Machines Corporation
    Inventors: Faisal A. Ahmad, Kevin C. Gower, Anish T. Patel