Patents by Inventor Anitha Yella

Anitha Yella has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7795902
    Abstract: An integrated circuit device includes an output buffer having a capacitance circuit configurable in a slew rate configuration or a decoupling configuration. In the slew rate configuration, the capacitance circuit electrically couples a capacitor of the capacitance circuit in a feedback path for reducing a slew rate of a buffered output signal generated by the output buffer. In the decoupling configuration, the capacitance circuit electrically couples the capacitor between a power potential and a ground potential of the output buffer for increasing power noise immunity of the output buffer. The output buffer may have more than capacitance circuit, each of which is individually configurable into the slew rate configuration or the decoupling configuration.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: September 14, 2010
    Assignee: Xilinx, Inc.
    Inventor: Anitha Yella