Abstract: A method for scan testing an integrated circuit that includes a plurality of on-chip logic modules includes configuring the integrated circuit for module level scan testing and chip level scan testing by way of an external automatic test pattern generator (ATPG) tool. The ATPG tool generates first and second sets of test patterns for module level and chip level scan testing of the integrated circuit. The ATPG tool generates the second set of test patterns by excluding the design faults which have already been targeted during the module level scan testing, from the first set of test patterns and reduces the overall time required for scan testing the integrated circuit.

Abstract: A method for scan testing an integrated circuit that includes a plurality of on-chip logic modules includes configuring the integrated circuit for module level scan testing and chip level scan testing by way of an external automatic test pattern generator (ATPG) tool. The ATPG tool generates first and second sets of test patterns for module level and chip level scan testing of the integrated circuit. The ATPG tool generates the second set of test patterns by excluding the design faults which have already been targeted during the module level scan testing, from the first set of test patterns and reduces the overall time required for scan testing the integrated circuit.

Abstract: A snubber circuit for use with a DC/DC converter broadly comprises a snubber resistor connected in parallel with a snubber inductor. The DC/DC converter may include a voltage source, a first switching element, a second switching element, an output inductor, and an output capacitor. The voltage source may include a positive terminal and a negative terminal connected to a ground node. The first switching element may include a first terminal connected to the positive terminal of the voltage source The second switching element may be connected to a second terminal of the first switching element. The series combination of the output inductor and the output capacitor may be connected between the second terminal of the first switching element and the ground node. The snubber circuit may be connected between the second switching element and the ground node.