Abstract: A High Electron Mobility Transistor (HEMT) having a reduced surface field (RESURF) junction is provided. The HEMT includes a source electrode at a first end and a drain electrode at a second end. A gate electrode is provided between the source electrode and the drain electrode. A reduced surface field (RESURF) junction extends from the first end to the second end. The gate electrode is provided above the RESURF junction. A buried channel layer is formed in the RESURF junction on application of a positive voltage at the gate electrode. The RESURF junction includes an n-type Gallium nitride (GaN) layer and a p-type GaN layer. The n-type GaN layer is provided between the p-type GaN layer and the gate electrode.

Abstract: A dual containment fitting may include a primary tubing, a secondary tubing, and a dual containment body. The secondary tubing may surround and be concentric with a first portion of the primary tubing forming a first leak containment space between the primary tubing and the secondary tubing. The dual containment body may include a flare fitting portion and a primary containment nut portion. The flare fitting portion may surround and be concentric with the primary tubing forming a second leak containment space between the primary tubing and the flare fitting portion. The primary containment nut portion may surround and be concentric with the flared end of the primary tubing forming a third leak containment space between the primary tubing and the primary containment nut portion. The primary containment nut portion may include at least one leak passage hole connecting the third leak containment space with the second leak containment space.

Abstract: A system and method of validating the accuracy of geographic location for an address is provided, as described in the embodiments. The system checks whether a given geographical location is the correct physical location for an address or not. An address whose location needs to be verified is parsed and broken down into at least one of nationality, state, city, town, locality, sub-locality, street, landmark, building, floor number, identification number, postal code, zip code or any other address identifying parameter. Similar addresses are searched for in the list of stored addresses and the verification check is done based on locations of the addresses found to be similar. In this way, the system establishes a trust score between the address and the geographic location of an entity.

Abstract: A system and method of validating the accuracy of geographic location for an address is provided, as described in the embodiments. The system checks whether a given geographical location is the correct physical location for an address or not. An address whose location needs to be verified is parsed and broken down into at least one of nationality, state, city, town, locality, sub-locality, street, landmark, building, floor number, identification number, postal code, zip code or any other address identifying parameter. Similar addresses are searched for in the list of stored addresses and the verification check is done based on locations of the addresses found to be similar. In this way, the system establishes a trust score between the address and the geographic location of an entity.

Abstract: Disclosed are various embodiments for software library versioning with intelligent caching based on signatures. In one embodiment, a library is requested in response to a first dependency in a first network resource. The library is then received together with a signature that identifies a version of the library. The library is stored in a local cache on a client computing device that is indexed by library signatures. It is determined that a second network resource has a second dependency on the library. The library is loaded from the local cache in response to the second dependency specifying the library having the same signature.

Abstract: The present disclosure provides an improved enhancement mode field effect transistor (FET) having an oxide (AlxTi1-xO) emulating p-type gate. The present disclosure provides a novel enhancement mode High Electron Mobility Transistor (HEMT) structure with AlxTi1-xO Gate Oxide Engineering as Replacement of p-GaN Gate. In an aspect, the present disclosure provides a hybrid gate stack that combines p-GaN technology with the proposed oxide for e-mode operation. The HEMT structure with AlxTi1-xO Gate oxide provides a threshold voltage tuning from negative to positive by changing p-doping composition. Using a developed p-type oxide, e-mode device shows ON current ˜400 mA/mm, sub-threshold slope of 73 mV/dec, Ron=8.9 ?mm, interface trap density <1010 mm?2eV?1 and gate leakage below 200 nA/mm at the OFF-state breakdown.

Abstract: A High Electron Mobility Transistor (HEMT) having a reduced surface field (RESURF) junction is provided. The HEMT includes a source electrode at a first end and a drain electrode at a second end. A gate electrode is provided between the source electrode and the drain electrode. A reduced surface field (RESURF) junction extends from the first end to the second end. The gate electrode is provided above the RESURF junction. A buried channel layer is formed in the RESURF junction on application of a positive voltage at the gate electrode. The RESURF junction includes an n-type Gallium nitride (GaN) layer and a p-type GaN layer. The n-type GaN layer is provided between the p-type GaN layer and the gate electrode.

Abstract: A dual containment fitting may include a primary tubing, a secondary tubing, and a dual containment body. The secondary tubing may surround and be concentric with a first portion of the primary tubing forming a first leak containment space between the primary tubing and the secondary tubing. The dual containment body may include a flare fitting portion and a primary containment nut portion. The flare fitting portion may surround and be concentric with the primary tubing forming a second leak containment space between the primary tubing and the flare fitting portion. The primary containment nut portion may surround and be concentric with the flared end of the primary tubing forming a third leak containment space between the primary tubing and the primary containment nut portion. The primary containment nut portion may include at least one leak passage hole connecting the third leak containment space with the second leak containment space.

Abstract: The present disclosure provides an improved enhancement mode field effect transistor (FET) having an oxide (AlxTi1-xO) emulating p-type gate. The present disclosure provides a novel enhancement mode High Electron Mobility Transistor (HEMT) structure with AlxTi1-xO Gate Oxide Engineering as Replacement of p-GaN Gate. In an aspect, the present disclosure provides a hybrid gate stack that combines p-GaN technology with the proposed oxide for e-mode operation. The HEMT structure with AlxTi1-xO Gate oxide provides a threshold voltage tuning from negative to positive by changing p-doping composition. Using a developed p-type oxide, e-mode device shows ON current ˜400 mA/mm, sub-threshold slope of 73 mV/dec, Ron=8.9 ?mm, interface trap density <1010 mm?2eV?1 and gate leakage below 200 nA/mm at the OFF-state breakdown.