Patents by Inventor Ann Dumoulin

Ann Dumoulin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6130478
    Abstract: A polymer stud grid array for microwave circuits is proposed which includes an injection-molded, three-dimensional substrate that is fabricated from an electrically insulating polymer. The substrate includes a plurality of polymer studs which are arranged over the underside of the substrate and which are integrally formed with the substrate during the injection-molding process. Signal connections are formed on the studs which include an end surface that is capable of being soldered. Potential connections are formed on at least one of the studs. The potential connection also includes an end surface that is capable of being soldered. Striplines are also constructed which connect the studs to the microwave circuit. Each stripline includes a first structured metal layer disposed on the underside of the substrate, a dielectric layer disposed on the first metal layer and a second structured metal layer disposed on top of the dielectric layer.
    Type: Grant
    Filed: April 18, 1998
    Date of Patent: October 10, 2000
    Assignees: Siemens N.V., Interuniversitair Micro-Electronica-Centrum VZW
    Inventors: Ann Dumoulin, Marcel Heerman, Jean Roggen, Eric Beyne, Rita van Hoof
  • Patent number: 6122172
    Abstract: In order to achieve better dissipation of the heat losses, a polymer stud grid array in proposed havingan injection-molded, three-dimensional substrate (S) composed of an electrically insulating polymer,polymer studs (PS) which are arranged over the area on the underneath of the substrate (S) and are integrally formed during injection molding,external connections which are formed on the polymer studs (PS) by an end surface which can be soldered,conductor runs which are formed at least on the underneath of the substrate (S) and connect the external connections to internal connections,at least one heat sink (WL) which is partially coated during the injection molding of the substrate (S), and havingat least one chip or wiring element (VE) which is arranged on the heat sink (WL) and whose connections are electrically conductively connected to the internal connections.The new configuration is suitable in particular for power components or power modules in a polymer stud grid array package.
    Type: Grant
    Filed: April 16, 1998
    Date of Patent: September 19, 2000
    Assignees: Siemens NV, Interuniversitair Micro-Electronica-Centrum VZW
    Inventors: Ann Dumoulin, Marcel Heerman, Jean Roggen, Eric Beyne, Rita van Hoof
  • Patent number: 5556812
    Abstract: A method for manufacturing multichip modules having layer sequences made of dielectric material with conducting tracks embedded therein is characterized by the following features: (1) a temperature-resistant, base-resistant polymer having a dielectric constant .ltoreq.3 is used as a dielectric material, which is applied to a non-conductive substrate and serves as an edge boundary for currentless, autocatalytic build-up of the conducting tracks; (2) the dielectric material is provided with a layer made of material which is soluble in organic solvents (lift-off layer); (3) the dielectric material and the lift-off layer are structured in a single lithographic step, either a direct or an indirect structuring taking place and grooves having an aspect ratio .gtoreq.
    Type: Grant
    Filed: June 27, 1995
    Date of Patent: September 17, 1996
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainer Leuschner, Hellmut Ahne, Siegfried Birkle, Albert Hammerschmidt, Recai Sezi, Tobias Noll, Ann Dumoulin