Patents by Inventor Ann Witvrouw

Ann Witvrouw has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9408312
    Abstract: A method and apparatus is provided for self-assembly of micro-components such as microchips onto a carrier substrate, provided with assembly locations for the components. The components are supplied to the carrier by a liquid flow, while a template substrate is arranged facing the carrier. The template is a substrate provided with openings aligned to the assembly locations. The carrier and template are submerged into a tank filled with the liquid, while the liquid flow is supplied to the template side together with the components, so that the components are guided towards the openings by the flow of liquid. Once a component is trapped into an opening of the template, substantially no further liquid flow through the opening is possible, so that following components are guided towards the remaining openings, thereby establishing a fast and reliable self-assembly process.
    Type: Grant
    Filed: August 12, 2015
    Date of Patent: August 2, 2016
    Assignee: IMEC
    Inventor: Ann Witvrouw
  • Patent number: 9278848
    Abstract: The disclosed technology relates generally to electromechanical devices, and relates more specifically to a nanoelectromechanical switch device and a method for manufacturing the same. In one aspect, an electromechanical device includes a first electrode stack and a second electrode stack, both electrode stacks extending in a vertical direction relative to a substrate surface and being spaced apart by a gap.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 8, 2016
    Assignees: IMEC, Katholieke Universiteit Leuven
    Inventors: Ann Witvrouw, Maliheh Ramezani, Stefan Cosemans
  • Patent number: 9224448
    Abstract: A non-volatile memory arrangement comprising a plurality of cells is disclosed. In one aspect, each cell comprises a memory element and a read selector in series. Further, the memory element is a nano-electro-mechanical switch comprising an anchor, a beam fixed to the anchor, a first and second control gate, for controlling the position of the beam, a first output node against which the beam can be positioned. The cell also comprises a read selector comprising a first selector terminal, a second selector terminal, the first selector terminal connected to the first output node. The first respectively second control gates of switches of a same word are connected together by a first respectively second write word line serving as control gate.
    Type: Grant
    Filed: December 2, 2014
    Date of Patent: December 29, 2015
    Assignees: IMEC vzw, Katholieke Universiteit Leuven
    Inventors: Stefan Cosemans, Ann Witvrouw, Maliheh Ramezani
  • Publication number: 20150351253
    Abstract: A method and apparatus is provided for self-assembly of micro-components such as microchips onto a carrier substrate, provided with assembly locations for said components. The components are supplied to the carrier by a liquid flow, while a template substrate is arranged facing the carrier. The template is a substrate provided with openings aligned to the assembly locations. The carrier and template are submerged into a tank filled with the liquid, while the liquid flow is supplied to the template side together with the components, so that the components are guided towards said openings by the flow of liquid. Once a component is trapped into an opening of the template, substantially no further liquid flow through said opening is possible, so that following components are guided towards the remaining openings, thereby establishing a fast and reliable self-assembly process.
    Type: Application
    Filed: August 12, 2015
    Publication date: December 3, 2015
    Inventor: Ann Witvrouw
  • Patent number: 9196603
    Abstract: A method and apparatus is provided for self-assembly of micro-components such as microchips onto a carrier substrate, provided with assembly locations for the components. The components are supplied to the carrier by a liquid flow, while a template substrate is arranged facing the carrier. The template is a substrate provided with openings aligned to the assembly locations. The carrier and template are submerged into a tank filled with the liquid, while the liquid flow is supplied to the template side together with the components, so that the components are guided towards the openings by the flow of liquid. Once a component is trapped into an opening of the template, substantially no further liquid flow through the opening is possible, so that following components are guided towards the remaining openings, thereby establishing a fast and reliable self-assembly process.
    Type: Grant
    Filed: May 2, 2012
    Date of Patent: November 24, 2015
    Assignee: IMEC
    Inventor: Ann Witvrouw
  • Publication number: 20150179246
    Abstract: A non-volatile memory arrangement comprising a plurality of cells is disclosed. In one aspect, each cell comprises a memory element and a read selector in series. Further, the memory element is a nano-electro-mechanical switch comprising an anchor, a beam fixed to the anchor, a first and second control gate, for controlling the position of the beam, a first output node against which the beam can be positioned. The cell also comprises a read selector comprising a first selector terminal, a second selector terminal, the first selector terminal connected to the first output node. The first respectively second control gates of switches of a same word are connected together by a first respectively second write word line serving as control gate.
    Type: Application
    Filed: December 2, 2014
    Publication date: June 25, 2015
    Inventors: Stefan Cosemans, Ann Witvrouw, Maliheh Ramezani
  • Publication number: 20140225167
    Abstract: The disclosed technology relates generally to electromechanical devices, and relates more specifically to a nanoelectromechanical switch device and a method for manufacturing the same. In one aspect, an electromechanical device includes a first electrode stack and a second electrode stack, both electrode stacks extending in a vertical direction relative to a substrate surface and being spaced apart by a gap.
    Type: Application
    Filed: December 18, 2013
    Publication date: August 14, 2014
    Applicants: Katholieke Universiteit Leuven, IMEC
    Inventors: Ann Witvrouw, Maliheh Ramezani, Stefan Cosemans
  • Patent number: 8592998
    Abstract: Anchor designs for thin film packages are disclosed that, in a preferred embodiment are a combination of SiGe-filled trenches and Si-oxide-filled spacing. Depending on the release process, additional manufacturing process steps are performed in order to obtain a desired mechanical strength. For aggressive release processes, additional soft sputter etch and a Ti—TiN interlayer in the anchor region may be added. The ratio of the total SiGe—SiGe anchor area to the SiO2—SiGe anchor area determines the mechanical strength of the anchor. If this ratio is larger than 1, the thin film package reaches the MIL-standard requirements.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: November 26, 2013
    Assignees: IMEC, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Gert Claes, Ann Witvrouw
  • Patent number: 8536662
    Abstract: A method is disclosed for manufacturing a semiconductor device, including providing a substrate comprising a main surface with a non flat topography, the surface comprising at least one substantial topography variation, forming a first capping layer over the main surface such that, during formation of the first capping layer, local defects in the first capping layer are introduced, the local defects being positioned at locations corresponding to the substantial topography variations and the local defects being suitable for allowing a predetermined fluid to pass through. Associated membrane layers, capping layers, and microelectronic devices are also disclosed.
    Type: Grant
    Filed: November 29, 2010
    Date of Patent: September 17, 2013
    Assignees: IMEC, Katholieke Universiteit Leuven, K.U. Leuven R&D
    Inventors: Ann Witvrouw, Luc Haspeslagh, Bin Guo, Simone Severi, Gert Claes
  • Patent number: 8383441
    Abstract: Methods for manufacturing micromachined devices and the devices obtained are disclosed. In one embodiment, the method comprises providing a structural layer comprising an amorphous semiconductor material, forming a shielding layer on a first portion of the structural layer and leaving exposed a second portion of the structural layer, and annealing the second portion using a first fluence. The method further comprises removing the shielding layer, and annealing the first portion and the second portion using a second fluence that is less than half the first fluence. In an embodiment, the device comprises a substrate layer, an underlying layer formed on the substrate layer, and a sacrificial layer formed on only a portion of the underlying layer. The device further comprises a structural layer that is in contact with the underlying layer and comprises a first region annealed using a first fluence and a second region annealed using a second fluence.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: February 26, 2013
    Assignees: IMEC, American University Cairo, Katholieke Universiteit
    Inventors: Joumana El Rifai, Ann Witvrouw, Ahmed Abdel Aziz, Sherif Sedky
  • Patent number: 8338296
    Abstract: The present disclosure is related to a method for forming a catalyst nanoparticle on a metal surface, the nanoparticle being suitable for growing a single nanostructure, in particular a carbon nanotube, the method comprising at least the steps of: providing a substrate, having a metal layer on at least a portion of the substrate surface, depositing a sacrificial layer at least on the metal layer, producing a small hole in the sacrificial layer, thereby exposing the metal layer, providing a single catalyst nanoparticle into the hole, removing the sacrificial layer. The disclosure is further related to growing a carbon nanotube from the catalyst nanoparticle.
    Type: Grant
    Filed: April 28, 2011
    Date of Patent: December 25, 2012
    Assignees: IMEC, Katholieke Universiteit Leuven, K.U. LEUVEN R&D
    Inventors: Hari Pathangi Sriraman, Ann Witvrouw, Philippe M. Vereecken
  • Publication number: 20120285010
    Abstract: A method and apparatus is provided for self-assembly of micro-components such as microchips onto a carrier substrate, provided with assembly locations for the components. The components are supplied to the carrier by a liquid flow, while a template substrate is arranged facing the carrier. The template is a substrate provided with openings aligned to the assembly locations. The carrier and template are submerged into a tank filled with the liquid, while the liquid flow is supplied to the template side together with the components, so that the components are guided towards the openings by the flow of liquid. Once a component is trapped into an opening of the template, substantially no further liquid flow through the opening is possible, so that following components are guided towards the remaining openings, thereby establishing a fast and reliable self-assembly process.
    Type: Application
    Filed: May 2, 2012
    Publication date: November 15, 2012
    Applicant: IMEC
    Inventor: Ann Witvrouw
  • Publication number: 20110315951
    Abstract: The present disclosure is related to a method for forming a catalyst nanoparticle on a metal surface, the nanoparticle being suitable for growing a single nanostructure, in particular a carbon nanotube, the method comprising at least the steps of: providing a substrate, having a metal layer on at least a portion of the substrate surface, depositing a sacrificial layer at least on the metal layer, producing a small hole in the sacrificial layer, thereby exposing the metal layer, providing a single catalyst nanoparticle into the hole, removing the sacrificial layer. The disclosure is further related to growing a carbon nanotube from the catalyst nanoparticle.
    Type: Application
    Filed: April 28, 2011
    Publication date: December 29, 2011
    Applicants: Katholieke Universiteit Leven, K.U.LEUVEN R&D, IMEC
    Inventors: Hari Pathangi Sriraman, Ann Witvrouw, Philippe M. Vereecken
  • Patent number: 8062497
    Abstract: One inventive aspect relates to a method for forming hermetically sealed cavities, e.g. semiconductor cavities comprising fragile devices, MEMS or NEMS devices. The method allows forming hermetically sealed cavities at a controlled atmosphere and pressure and at low temperatures, for example, at temperatures not exceeding about 200° C. The method further allows forming sealed cavities with short release times, for example, release times of about a few minutes to 30 minutes. The method may, for example, be used for zero level packaging of MEMS or NEMS devices.
    Type: Grant
    Filed: March 28, 2007
    Date of Patent: November 22, 2011
    Assignee: IMEC
    Inventors: Ann Witvrouw, Raquel Hellin Rico, Jean-Pierre Celis
  • Publication number: 20110180886
    Abstract: Methods for manufacturing micromachined devices and the devices obtained are disclosed. In one embodiment, the method comprises providing a structural layer comprising an amorphous semiconductor material, forming a shielding layer on a first portion of the structural layer and leaving exposed a second portion of the structural layer, and annealing the second portion using a first fluence. The method further comprises removing the shielding layer, and annealing the first portion and the second portion using a second fluence that is less than half the first fluence. In an embodiment, the device comprises a substrate layer, an underlying layer formed on the substrate layer, and a sacrificial layer formed on only a portion of the underlying layer. The device further comprises a structural layer that is in contact with the underlying layer and comprises a first region annealed using a first fluence and a second region annealed using a second fluence.
    Type: Application
    Filed: January 21, 2011
    Publication date: July 28, 2011
    Applicants: IMEC, AMERICAN UNIVERSITY IN CAIRO, KATHOLIEKE UNIVERSITEIT LEUVEN, K.U. LEUVEN R&D
    Inventors: Joumana El Rifai, Ann Witvrouw, Ahmed Kamal Said Abdel Aziz, Sherif Sedky
  • Publication number: 20110180943
    Abstract: Anchor designs for thin film packages are disclosed that, in a preferred embodiment are a combination of SiGe-filled trenches and Si-oxide-filled spacing. Depending on the release process, additional manufacturing process steps are performed in order to obtain a desired mechanical strength. For aggressive release processes, additional soft sputter etch and a Ti—TiN interlayer in the anchor region may be added. The ratio of the total SiGe—SiGe anchor area to the SiO2—SiGe anchor area determines the mechanical strength of the anchor. If this ratio is larger than 1, the thin film package reaches the MIL-standard requirements.
    Type: Application
    Filed: January 24, 2011
    Publication date: July 28, 2011
    Applicants: IMEC, Katholieke Universiteit Leuven, K.U. Leuven R&D
    Inventors: Gert Claes, Ann Witvrouw
  • Publication number: 20110163399
    Abstract: A method is disclosed for manufacturing a sealed cavity in a microelectronic device, comprising forming a sacrificial layer at least at locations where the cavity is to be provided, depositing a membrane layer over the top of the sacrificial layer, patterning the membrane layer in at least two separate membrane layer blocks, removing the sacrificial layer through the membrane layer, and sealing the cavity by sealing the membrane layer, wherein patterning the membrane layer is performed after removal of the sacrificial layer.
    Type: Application
    Filed: November 29, 2010
    Publication date: July 7, 2011
    Applicant: IMEC
    Inventors: Ann Witvrouw, Luc Haspeslagh, Gert Claes
  • Publication number: 20110127650
    Abstract: A method is disclosed for manufacturing a semiconductor device, including providing a substrate comprising a main surface with a non flat topography, the surface comprising at least one substantial topography variation, forming a first capping layer over the main surface such that, during formation of the first capping layer, local defects in the first capping layer are introduced, the local defects being positioned at locations corresponding to the substantial topography variations and the local defects being suitable for allowing a predetermined fluid to pass through. Associated membrane layers, capping layers, and microelectronic devices are also disclosed.
    Type: Application
    Filed: November 29, 2010
    Publication date: June 2, 2011
    Applicants: IMEC, KATHOLIEKE UNIVERSITEIT LEUVEN, K.U. LEUVEN R&D
    Inventors: Ann Witvrouw, Luc Haspeslagh, Bin Guo, Simone Severi, Gert Claes
  • Publication number: 20100255662
    Abstract: The invention relates to methods for preparing as-deposited, low-stress and low resistivity polycrystalline silicon-germanium layers and semiconductor devices utilizing the silicon-germanium layers. These layers can be used in Micro Electro-Mechanical Systems (MEMS) devices or micro-machined structures.
    Type: Application
    Filed: April 21, 2010
    Publication date: October 7, 2010
    Applicant: IMEC
    Inventor: Ann Witvrouw
  • Patent number: 7803665
    Abstract: Manufacturing a semiconductor device involves forming (200) a sacrificial layer where a micro cavity is to be located, forming (210) a metal layer of thickness greater than 1 micron over the sacrificial layer, forming (220) a porous layer from the metal layer, the porous layer having pores of length greater than ten times their breadth, and having a breadth in the range 10 nm-500 nanometers. The pores can be created by anodising, electrodeposition or dealloying. Then the sacrificial layer can be removed (230) through the porous layer, to form the micro cavity, and pores can be sealed (240). Encapsulating MEMS devices with a porous layer can reduce costs by avoiding using photolithography for shaping the access holes since the sacrificial layer is removed through the porous membrane.
    Type: Grant
    Filed: February 6, 2006
    Date of Patent: September 28, 2010
    Assignees: IMEC, Katholieke Universiteit Leuven, K.U. Leuven R&D
    Inventors: Ann Witvrouw, Chris Van Hoof, Raquel Consuelo Hellin Rico, Anthony Joseph Muscat, Jan Fransaer, Jean-Pierre Celis