Patents by Inventor Anna Elman

Anna Elman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6961918
    Abstract: The invention provides a knowledge management system particularly suited for use in the integrated circuit design environment. The system allows administrators to define standardized component types. Instantiated components versions comprise “deliverables” and “attributes.” Deliverables comprise a file or directory of files or groups of files or directories that perform a common function and are characterized by the system in a standardized manner. Attributes comprise metadata describe the component version. By the abstraction of design files into deliverables, the systems can work with design files originating from any source and having different structures and still make those design files available by other designers in a uniform manner for efficient reuse of pre-qualified components. Tasks in the design flow can be tracked in the system. The system may also include a communications application, an issue tracking application, and an audit trail application.
    Type: Grant
    Filed: June 21, 2001
    Date of Patent: November 1, 2005
    Inventors: Robert E. Garner, David N. Gardner, Jeffrey Jussel, Anna Elman, David Ling, Alvaro Eduardo Benavides, Mark A. McAdams
  • Patent number: 6546429
    Abstract: A non-uniform memory access (NUMA) computer system includes at least a local processing node and a remote processing node, with a node controller, that are coupled to a node interconnect. In response to receipt by the node controller of a request transaction transmitted from the local processing node, via the node interconnect, the node controller at the remote processing node issues the request transaction on the local interconnect. If the request transaction receives a retry response at the remote processing node, the node controller reissues the request transaction on the local interconnect at least once, thus giving the request transaction another opportunity to complete successfully.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: April 8, 2003
    Assignee: International Business Machines Corporation
    Inventors: Yoanna Baumgartner, Anna Elman, Glen Douglas Harris
  • Publication number: 20020019730
    Abstract: The invention provides a knowledge management system particularly suited for use in the integrated circuit design environment. The system allows administrators to define standardized component types. Instantiated components versions comprise “deliverables” and “attributes.” Deliverables comprise a file or directory of files or groups of files or directories that perform a common function and are characterized by the system in a standardized manner. Attributes comprise metadata describe the component version. By the abstraction of design files into deliverables, the systems can work with design files originating from any source and having different structures and still make those design files available by other designers in a uniform manner for efficient reuse of pre-qualified components. Tasks in the design flow can be tracked in the system. The system may also include a communications application, an issue tracking application, and an audit trail application.
    Type: Application
    Filed: June 21, 2001
    Publication date: February 14, 2002
    Inventors: Robert E. Garner, David Neal Gardner, Jeffrey Jussel, Anna Elman, David Ling, Alvaro Eduardo Benavides, Mark Alan McAdams
  • Patent number: 6338122
    Abstract: A non-uniform memory access (NUMA) computer system includes at least a local processing node and a remote processing node that are each coupled to a node interconnect. The local processing node includes a local interconnect, a processor and a system memory coupled to the local interconnect, and a node controller interposed between the local interconnect and the node interconnect. In response to receipt of a read request from the local interconnect, the node controller speculatively transmits the read request to the remote processing node via the node interconnect. Thereafter, in response to receipt of a response to the read request from the remote processing node, the node controller handles the response in accordance with a resolution of the read request at the local processing node.
    Type: Grant
    Filed: December 15, 1998
    Date of Patent: January 8, 2002
    Assignee: International Business Machines Corporation
    Inventors: Yoanna Baumgartner, Mark Edward Dean, Anna Elman
  • Patent number: 6275907
    Abstract: A non-uniform memory access (NUMA) computer system includes a plurality of processing nodes coupled to a node interconnect. The plurality of processing nodes include at least a remote processing node, which contains a processor having an associated cache hierarchy, and a home processing node. The home processing node includes a shared system memory containing a plurality of memory granules and a coherence directory that indicates possible coherence states of copies of memory granules among the plurality of memory granules that are stored within at least one processing node other than the home processing node. If the processor within the remote processing node has a reservation for a memory granule among the plurality of memory granules that is not resident within the associated cache hierarchy, the coherence directory associates the memory granule with a coherence state indicating that the reserved memory granule may possibly be held non-exclusively at the remote processing node.
    Type: Grant
    Filed: November 2, 1998
    Date of Patent: August 14, 2001
    Assignee: International Business Machines Corporation
    Inventors: Yoanna Baumgartner, Gary Dale Carpenter, Mark Edward Dean, Anna Elman, James Stephen Fields, Jr., David Brian Glasco
  • Patent number: 6108764
    Abstract: A non-uniform memory access (NUMA) computer system includes first and second processing nodes that are coupled together. The first processing node includes a system memory and first and second processors that each have a respective associated cache hierarchy. The second processing node includes at least a third processor and a system memory. If the cache hierarchy of the first processor holds an unmodified copy of a cache line and receives a request for the cache line from the third processor, the cache hierarchy of the first processor sources the requested cache line to the third processor and retains a copy of the cache line in a Recent coherency state from which the cache hierarchy of the first processor can source the cache line in response to subsequent requests.
    Type: Grant
    Filed: December 17, 1998
    Date of Patent: August 22, 2000
    Assignee: International Business Machines Corporation
    Inventors: Yoanna Baumgartner, Anna Elman