Patents by Inventor Anna K. Kujtkowski

Anna K. Kujtkowski has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6891829
    Abstract: Packet processing circuitry comprises a look-up engine and a processor. The look-up engine transfers a first selector to a CAM and receives a corresponding first result from the CAM. The look-up engine retrieves a first context structure based on the first result. The look-up engine builds a summation block using the first context structure and transfers the summation block. The processor receives and processes the summation block to control handling of the communication packet.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: May 10, 2005
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Paul V. Bergantino, Anna K. Kujtkowski, Jeffrey M. Winston
  • Patent number: 6845099
    Abstract: Packet processing circuitry comprises a processor and a look-up engine. The look-up engine transfers a first selector to a CAM and receives a corresponding first result from the CAM. The look-up engine generates a second selector based on the first result. The look-up engine transfers the second selector to the CAM and receives a corresponding second result from the CAM. The look-up engine retrieves a first context structure based on the second result. The look-up engine builds a summation block using the first context structure and transfers the summation block to the processor. The processor receives and processes the summation block to control handling of the communication packet.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: January 18, 2005
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Paul V. Bergantino, Anna K. Kujtkowski, Jeffrey M. Winston
  • Patent number: 6826180
    Abstract: Packet processing circuitry comprises a processor and a look-up engine. For a first communication packet, the look-up engine transfers a first selector to a CAM and receives a corresponding first result from the CAM, retrieves a first context structure based on the first result and builds a summation block using the first context structure, transfers the summation block to the processor, writes a second selector to the CAM and receives a corresponding second result from the CAM, and writes the summation block to a memory location corresponding to the second result. For a second communication packet, the look-up engine transfers the second selector to the CAM and receives the corresponding second result from the CAM, retrieves the summation block based on the second result and transfers the summation block to the processor The processor receives and processes the summation block to control handling of the first and second communication packets.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: November 30, 2004
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Paul V. Bergantino, Anna K. Kujtkowski, Jeffrey M. Winston
  • Patent number: 6798778
    Abstract: Packet processing circuitry comprises a look-up engine and a processor. The look-up engine transfers a selector to a CAM and receives a corresponding result from the CAM. The look-up engine retrieves a context structure from a context memory based on the result and transfers the context structure to the processor. The processor receives and processes the context structure to control handling of the communication packet. The processor modifies the context structure and transfers the modified context structure to the look-up engine. The processor generates an update instruction and transfers the update instruction to the look-up engine. The look-up engine receives the update instruction and the modified context structure. The look-up engine automatically writes the modified context structure to the context memory in response to the update instruction.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: September 28, 2004
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Paul V. Bergantino, Anna K. Kujtkowski, Jeffrey M. Winston
  • Patent number: 6791983
    Abstract: A content-addressable memory is comprised of processing logic and selector logic. The processing logic receives a first selector including packet header information from the packet processing circuitry. The processing logic transfers the first selector to the selector logic. The processing logic generates additional selectors and transfers the additional selectors to the selector logic. The selector logic receives and processes selectors for matches and provides results corresponding to the matches. The processing logic receives the results from the selector logic and transfers at least some of the results that point to packet processing context structures to the packet processing circuitry.
    Type: Grant
    Filed: March 8, 2001
    Date of Patent: September 14, 2004
    Assignee: Mindspeed Technologies, Inc.
    Inventors: Paul V. Bergantino, Anna K. Kujtkowski, Jeffrey M. Winston
  • Publication number: 20020122419
    Abstract: Packet processing circuitry comprises a processor and a look-up engine. The look-up engine transfers a first selector to a CAM and receives a corresponding first result from the CAM. The look-up engine generates a second selector based on the first result. The look-up engine transfers the second selector to the CAM and receives a corresponding second result from the CAM. The look-up engine retrieves a first context structure based on the second result. The look-up engine builds a summation block using the first context structure and transfers the summation block to the processor. The processor receives and processes the summation block to control handling of the communication packet.
    Type: Application
    Filed: March 8, 2001
    Publication date: September 5, 2002
    Inventors: Paul V. Bergantino, Anna K. Kujtkowski, Jeffrey M. Winston