Abstract: Techniques for providing a synthetic price are described herein. The techniques may include a method of synthetic price provisioning including identifying a device operating in a consumption entity, wherein the device operates at least partially based on a pricing signal provided by an energy provider. Optimal operation is determined based on the device and other devices in the consumption entity. The method includes providing a synthetic pricing signal to replace the pricing signal provided by the energy provider such that the devices operate according to the optimization model.

Abstract: Pulse width modulation (PWM) based on selectable phases of a system clock may be implemented with respect to leading-edge-modulation (LEM), trailing-edge-modulation (TEM), and/or dual-edge-modulation. An initial pulse may be generated based on a duty command, synchronous with the system clock, and may be registered with a D flip-flop under control of a selected phase of the system clock. Alternatively, a target count may be derived from the duty command, and an edge of the PWM pulse may be initiated when a count of the selected phase equals the target count. The pulse edge may be registered by a D flip-flop to a SR flip-flop under control of the selected phase. The phases of the system clock may be shared amongst multiple systems to generate multiple PWM signals. A system may include a DLL and digital logic, which may consist essentially of combinational logic and registers.

Abstract: Techniques for providing a synthetic price are described herein. The techniques may include a method of synthetic price provisioning including identifying a device operating in a consumption entity, wherein the device operates at least partially based on a pricing signal provided by an energy provider. Optimal operation is determined based on the device and other devices in the consumption entity. The method includes providing a synthetic pricing signal to replace the pricing signal provided by the energy provider such that the devices operate according to the optimization model.

Abstract: A voltage regulator may include a voltage converter to generate an output voltage based on an input voltage and a control signal. The voltage regulator may also include a control loop to adjust the control signal based on a magnitude of an error between a digital representation of the output voltage and an adaptive digital reference voltage. Additionally, the voltage regulator can have adaptive voltage positioning logic to modify the adaptive digital reference voltage based on the magnitude of the error.

Abstract: Pulse width modulation (PWM) based on selectable phases of a system clock may be implemented with respect to leading-edge-modulation (LEM), trailing-edge-modulation (TEM), and/or dual-edge-modulation. An initial pulse may be generated based on a duty command, synchronous with the system clock, and may be registered with a D flip-flop under control of a selected phase of the system clock. Alternatively, a target count may be derived from the duty command, and an edge of the PWM pulse may be initiated when a count of the selected phase equals the target count. The pulse edge may be registered by a D flip-flop to a SR flip-flop under control of the selected phase. The phases of the system clock may be shared amongst multiple systems to generate multiple PWM signals. A system may include a DLL and digital logic, which may consist essentially of combinational logic and registers.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: Methods and systems to generate a digital error indication of an input signal relative to a reference signal, using resistors, comparators, and latches. The digital error indication may indicate that the input signal is within a range of the reference signal, above the range, or below the range. The methods and systems may be implemented within a multi-phase digital voltage regulator to generate a digital error indication for each of a plurality of phase currents relative to an instantaneous average of the phase currents. The digital voltage regulator may be fabricated on an integrated circuit die with a corresponding load, such as a processor. The digital voltage regulator may include a plurality of multiplier or look-up based gain modules, each to receive a corresponding one of the digital error signals and to output one of three values. Outputs of each gain module may be integrated over time.

Abstract: Various embodiments associated with methods, apparatuses and systems, digital pulse width modulator (DPWM) comprising a counter logic, including a bitwise negator, and a delay-locked loop (DLL), are disclosed herein. The embodiments may potentially have a shorter processing delay, smaller footprint and/or less power consumption. Other embodiments be also be disclosed or claimed.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: Various embodiments associated with methods, apparatuses and systems, digital pulse width modulator (DPWM) comprising a counter logic, including a bitwise negator, and a delay-locked loop (DLL), are disclosed herein. The embodiments may potentially have a shorter processing delay, smaller footprint and/or less power consumption. Other embodiments be also be disclosed or claimed.

Abstract: Methods and systems to generate a digital error indication of an input signal relative to a reference signal, using resistors, comparators, and latches. The digital error indication may indicate that the input signal is within a range of the reference signal, above the range, or below the range. The methods and systems may be implemented within a multi-phase digital voltage regulator to generate a digital error indication for each of a plurality of phase currents relative to an instantaneous average of the phase currents. The digital voltage regulator may be fabricated on an integrated circuit die with a corresponding load, such as a processor. The digital voltage regulator may include a plurality of multiplier or look-up based gain modules, each to receive a corresponding one of the digital error signals and to output one of three values. Outputs of each gain module may be integrated over time.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: A voltage regulator may include a voltage converter to generate an output voltage based on an input voltage and a control signal. The voltage regulator may also include a control loop to adjust the control signal based on a magnitude of an error between a digital representation of the output voltage and an adaptive digital reference voltage. Additionally, the voltage regulator can have adaptive voltage positioning logic to modify the adaptive digital reference voltage based on the magnitude of the error.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: In some embodiments, a three-switch dual output buck converter includes a converter circuit having N+1 switch circuits, the converter circuit being configured to receive an input voltage and to provide N output voltages, where N is two or more, and a control circuit to selectively provide control signals to the N+1 switch circuits at time intervals in accordance with the N output voltages, wherein the N output voltages include at least two different types of outputs. Other embodiments are disclosed and claimed.

Abstract: Methods and mechanisms to simultaneously regulate two or more supply voltages provided to an integrated circuit by a voltage regulator. In an embodiment of the invention, a voltage regulation message exchanged between the integrated circuit and the voltage regulator includes an identifier indicating two or more supply voltages selected from a plurality of supply voltages provided to the integrated circuit by the voltage regulator, where the voltage regulation message relates to the indicated two or more supply voltages. In another embodiment, the voltage regulation message indicates a desired supply voltage level to which the indicated two or more supply voltages are to transition.

Abstract: In some embodiments, a power manager may be coupled to a load circuit and configured to receive an input signal indicating a line disturbance on a power supply line and to reduce a load requirement of the load circuit in accordance with the received signal. The power manager may be configured to selectively reduce power to components with low entrance latency while continuing to provide full power to components with high entrance latency. Other embodiments are disclosed and claimed.

Abstract: In some embodiments, an N output isolated converter includes an isolated converter circuit having N+1 switch circuits, the isolated converter circuit being configured to receive an input voltage and to provide N output voltages, where N is two or more, and a control circuit to selectively provide control signals to the N+1 switch circuits at time intervals in accordance with the N output voltages. The N output isolated converter may include a single secondary transformer. Other embodiments are disclosed and claimed.

Abstract: An unregulated isolated DC/DC converter is configured to receive an input signal and to provide an output signal. A ripple control circuit is coupled to the unregulated isolated DC/DC converter, wherein the ripple control circuit is configured to reduce an amount of low frequency ripple transferred to the output signal from the input signal.