Abstract: A method estimating a series or parallel nature and a location of an arc in a photovoltaic device, operating under direct current, including N (N=1 or N>1) strings of photovoltaic modules, connected to a charge device having a capacitive behaviour for the modules, the method including: a) detecting, at terminals of each of the modules of each string, evolution of voltage over time, during formation of an electric arc; b) identifying the modules at the terminals of which a voltage variation occurs between a first zone with stable voltage and a second zone with stable voltage for a duration of at least 5 ?s, which immediately follows the voltage variation, and identifying the sign of each voltage variation; c) estimating the series or parallel nature and the location of the arc in the photovoltaic device.

Abstract: The present invention relates to a method for manufacturing a monolithic silicon wafer (10) comprising multiple vertical junctions (2) having an alternation of n-doped areas and p-doped areas, including at least the steps of: (i) providing a liquid bath (100) including silicon, at least one n-type doping agent and at least one p-type doping agent; (ii) proceeding to directionally solidify the silicon in a direction (I), varying the convection-diffusion parameters thereof in order to alternate the growth of n-doped silicon layers (101) and p-doped silicon layers (102); and (iii) cutting a slice (104), parallel to the direction (I), of the multi-layer structure obtained at the end of the step (ii), such as to obtain said expected wafer (10).

Abstract: A method estimating a series or parallel nature and a location of an arc in a photovoltaic device, operating under direct current, including N (N=1 or N>1) strings of photovoltaic modules, connected to a charge device having a capacitive behaviour for the modules, the method including: a) detecting, at terminals of each of the modules of each string, evolution of voltage over time, during formation of an electric arc; b) identifying the modules at the terminals of which a voltage variation occurs between a first zone with stable voltage and a second zone with stable voltage for a duration of at least 5 ?s, which immediately follows the voltage variation, and identifying the sign of each voltage variation; c) estimating the series or parallel nature and the location of the arc in the photovoltaic device.

Abstract: The present invention relates to a method for manufacturing a monolithic silicon wafer (10) comprising multiple vertical junctions (2) having an alternation of n-doped areas and p-doped areas, including at least the steps of: (i) providing a liquid bath (100) including silicon, at least one n-type doping agent and at least one p-type doping agent; (ii) proceeding to directionally solidify the silicon in a direction (I), varying the convection-diffusion parameters thereof in order to alternate the growth of n-doped silicon layers (101) and p-doped silicon layers (102); and (iii) cutting a slice (104), parallel to the direction (I), of the multi-layer structure obtained at the end of the step (ii), such as to obtain said expected wafer (10).