Abstract: Stress corrosion induced voiding of patterned metal layers is avoided or substantially reduced by removing etching residues before gap filling. Embodiments include etching an Al or Al alloy layer employing fluorine and/or chlorine chemistry, wet cleaning, treating with a nitrogen-containing plasma at a temperature of at least about 400° C. and gap filling with a dielectric material, e.g. HDP oxide by HDPCVD.

Abstract: A SiON ARC/hard mask is formed on a metal layer and patterned, thereby avoiding a separate hard mask. The use of SiON as a combined ARC/hard mask enables a reduction in the height of the metal stack, thereby reducing capacitance between metal lines and increasing circuit speed. In addition, etch marginality is improved due to the reduced aspect ratio. Embodiments include forming a thin silicon oxide layer on the SiON arc/hard mask before depositing a deep UV photoresist layer to minimize footing.

Abstract: The inventive method provides a wet cleaning of semiconductor devices on semiconductor wafers after photoresist is stripped. Semiconductor wafers are placed into a centrifuge carriage of a processing chamber. The centrifuge carriage rotates the semiconductor wafers. N-methylpyrrolidine heated to a temperature between 65° C. and 85° C. is sprayed onto the semiconductor wafers. Next N-methylpyrrolidine at room temperature is sprayed onto the semiconductor wafers. Finally, water at room temperature is sprayed onto the semiconductor wafers. The inventive method provides high throughput cleaning without undue corrosion or damage to metal layers.

Abstract: A method of manufacturing semiconductor wafers wherein a metal layer is formed on a surface of a layer of interlayer dielectric on a partially completed semiconductor wafer and if it is determined that the metal layer is faulty, the faulty metal layer is removed, the surface of the layer of interlayer dielectric is lowered below the tops of metal plugs formed in the layer of interlayer dielectric, the tops of the metal plugs are planarized to the surface of the layer of interlayer dielectric and the metal layer is reformed on the surface of the interlayer dielectric. If the metal layer is determined to be good, the metal layer is etched. If the metal etch is faulty, the metal layer is removed, the layer of interlayer dielectric is reduced to below the tops of plugs formed in the layer of interlayer dielectric, the tops of the metal plugs are planarized down to the surface of the layer of interlayer dielectric and the layer of metal is reformed.

Abstract: The inventive method provides a wet cleaning of semiconductor devices on semiconductor wafers after photoresist is stripped. Semiconductor wafers are placed into a centrifuge carriage of a processing chamber. The centrifuge carriage rotates the semiconductor wafers. N-methylpyrrolidine heated to a temperature between 65° C. and 85° C. is sprayed onto the semiconductor wafers. Next N-methylpyrrolidine at room temperature is sprayed onto the semiconductor wafers. Finally, water at room temperature is sprayed onto the semiconductor wafers. The inventive method provides high throughput cleaning without undue corrosion or damage to metal layers.

Abstract: Stress corrosion induced voiding of patterned metal layers is avoided or substantially reduced by removing etching residues before gap filling. Embodiments include etching an Al or Al alloy layer employing fluorine and/or chlorine chemistry, wet cleaning, treating with a nitrogen-containing plasma at a temperature of at least about 400° C. and gap filling with a dielectric material, e.g. HDP oxide by HDP CVD.

Abstract: Stress corrosion induced voiding of patterned metal layers is avoided or substantially reduced by removing etching residues before gap filling. Embodiments include etching an Al or Al alloy layer employing fluorine and/or chlorine chemistry, wet cleaning, treating with a plasma containing ammonia or ammonia and oxygen at a temperature of at least about 400° C. and gap filling with a dielectric material, e.g. HDP oxide by HDP CVD.

Abstract: The inventive method provides a wet cleaning of semiconductor devices on semiconductor wafers after photoresist is stripped. Semiconductor wafers are placed into a centrifuge carriage of a processing chamber. The centrifuge carriage rotates the semiconductor wafers. N-methylpyrrolidine heated to a temperature between 65° C. and 85° C. is sprayed onto the semiconductor wafers. Next N-methylpyrrolidine at room temperature is sprayed onto the semiconductor wafers. Finally, water at room temperature is sprayed onto the semiconductor wafers. The inventive method provides high throughput cleaning without undue corrosion or damage to metal layers.

Abstract: A defective photoresist mask is removed from a metal layer prior to etching by low-temperature processing to minimize or substantially eliminate any resulting residue on the metal layer, thereby enabling the formation of an interconnection pattern with minimal defects. Embodiments include removing the defective mask by applying a solvent at a temperature of about 80° C. or less, forming a new photoresist mask, and etching the underlying metal layer. The substantial elimination of residue on the metal layer prior to etching avoids bridging between resulting interconnection lines and, hence, short circuiting and device failure.

Abstract: A method of manufacturing a semiconductor wafer wherein a layer of hardmask material is formed on the surface of a metal layer formed on a layer of interlayer dielectric formed on a semiconductor substrate on and in which active devices have been formed. A layer of photoresist is formed on the surface of the layer of hardmask material, patterned and developed exposing portions of the underlying layer of hardmask material. The semiconductor wafer is placed in an etched and the layer of hardmask material is etched in a first process utilizing a combination fluorine and chlorine chemistry and the metal layer is etched in a second process utilizing a combination fluorine and chlorine chemistry.

Abstract: A method of manufacturing a semiconductor wafer in a chamber having a chuck and in which temperature changes in the chamber cause residual manufacturing materials to fall onto the surface of a production wafer placed on the chuck. When the temperature of the chamber is to be changed, a protection wafer is placed on the surface of the chuck. When the temperature has been changed, the protection wafer is removed from the surface of the chuck and a production wafer is placed on the surface of the chuck and clamped. When the process is complete the production wafer is removed and the protection wafer is placed on the chuck.