Abstract: Apparatus and method for a quantum control processor. For example, one embodiment of a QCP comprises: instruction fetch logic to fetch instructions from a memory, the instructions including quantum instructions; decode logic to decode the quantum instructions into a first plurality of quantum microoperations; translation logic translate the first plurality of quantum microoperations into a second plurality of quantum microoperations based on characteristics of a plurality of quantum controller cores coupled to the quantum control processor; and issue logic to synchronously issue the second plurality of quantum microoperations in parallel to the plurality of quantum controller cores.

Abstract: An apparatus, method, and machine-readable medium are described for processing and loading classical data into quantum computers. For example, in one embodiment, a machine-readable medium has program code stored thereon which, when executed by a machine, causes the machine to perform the operations of: receiving an input tensor corresponding to a quantum state; performing a sequence of tensor network operations on the input tensor to determine an output tensor representing an ordered list of quantum gates to be executed by a specified target quantum device, wherein the sequence of tensor network operations include a plurality of singular value decomposition (SVD) operations and one or more operations to ensure that the output tensor is unitary.

Abstract: Apparatus and method for a full quantum system simulator. For example, one embodiment of a method comprises: initializing a quantum computing system simulator for simulating multiple layers of a quantum system including one or more non-quantum layers and one or more physical quantum device layers of the quantum system; simulating a first set of operations of the one or more non-quantum layers of the quantum system to generate first simulation results; simulating a second set of operations of the one or more quantum device layers of the quantum system to generate second simulation results; analyzing the first and second simulation results to provide at least one configuration recommendation for the quantum system.

Abstract: Apparatus and method for a full quantum system simulator. For example, one embodiment of a method comprises: initializing a quantum computing system simulator for simulating multiple layers of a quantum system including one or more non-quantum layers and one or more physical quantum device layers of the quantum system; simulating a first set of operations of the one or more non-quantum layers of the quantum system to generate first simulation results; simulating a second set of operations of the one or more quantum device layers of the quantum system to generate second simulation results; analyzing the first and second simulation results to provide at least one configuration recommendation for the quantum system.

Abstract: Apparatus and method for compiling and executing hybrid classical-quantum programs. For example, one embodiment of an apparatus comprises: a host processor to perform a partial compilation on hybrid quantum-classical source code to generate one or more sequential blocks of quantum operations; a quantum compiler accelerator to receive compilation work offloaded by the host processor including the one or more sequential blocks of quantum operations, the quantum compiler to perform optimization operations to optimize runtime execution of one or more of the quantum operations in view if a quantum accelerator architecture to generate optimized quantum operations; and a quantum execution accelerator having the quantum accelerator architecture to execute the optimized quantum operations to manipulate a state of one or more qubits, to measure a state of the one or more qubits, and to provide measurement data indicating the state to the host processor.

Abstract: Apparatus and method for error reduction in distributed quantum computing via fusing-and-decomposing gates. For example, one embodiment of an apparatus comprises: a quantum module comprising a plurality of qubits; unitary generation logic to combine a group of quantum gates to form at least one unitary operation; decomposition logic to decompose the unitary operation into multiple alternative gate sequences comprising either exact gate sequences or approximate gate sequences; and selection logic to evaluate the multiple alternative gate sequences based on a cost function to identify at least one of the gate sequences.

Abstract: Technologies for a hybrid digital/analog processor for a quantum computer are disclosed. In the illustrative embodiment, a hybrid digital/analog processor may be able to process digital instructions as well as analog instructions. The digital instructions may be, e.g., read from or write to memory or registers, perform an arithmetic operation, perform a branch, etc. The analog instructions may be to, e.g., provide an analog voltage to a particular electrode of a qubit, provide an analog pulse to a qubit, measure a reflection of an analog signal from a qubit, etc. The integration of analog operations in the hybrid digital/analog processor can improve performance by, e.g., lowering latency and lowering power usage.

Abstract: Apparatus and method for measurement-free (MF) quantum error correction (QEC). For example, one embodiment of a method comprises: determining an error syndrome on a first subset of ancilla qubits of a quantum processor; decoding the error syndrome to produce decoded results on a second subset of ancilla qubits of the quantum processor; applying the decoded results to one or more system qubits; and unconditionally resetting the first subset and/or second subset of ancilla qubits to remove entropy and/or noise from the quantum system, wherein the operations of determining the error syndrome, decoding the error syndrome, applying the error syndrome, and unconditionally resetting the first and/or second subset of ancilla qubits are performed responsive to a qubit controller executing quantum control instructions provided from or derived from a script and without transmitting measurement data related to the error syndrome to a non-quantum computing device.

Abstract: Apparatus and method for compiling and executing hybrid classical-quantum programs. For example, one embodiment of a method comprises: reading source code specifying both non-quantum operations to be performed by a host processor and quantum operations to be performed by a quantum accelerator; compiling the source code to generate a target object file, wherein portions of the source code specifying the quantum operations are compiled into quantum basic blocks (QBBs) in the target object file, each QBB comprising one or more quantum instructions to be executed by the quantum accelerator and wherein portions of the source code specifying the non-quantum operations are compiled into native instructions to be executed by the host processor.

Abstract: Apparatus and method for error reduction in distributed quantum computing via fusing-and-decomposing gates. For example, one embodiment of an apparatus comprises: a quantum module comprising a plurality of qubits; unitary generation logic to combine a group of quantum gates to form at least one unitary operation; decomposition logic to decompose the unitary operation into multiple alternative gate sequences comprising either exact gate sequences or approximate gate sequences; and selection logic to evaluate the multiple alternative gate sequences based on a cost function to identify at least one of the gate sequences.

Abstract: Apparatus and method for measurement-free (MF) quantum error correction (QEC). For example, one embodiment of a method comprises: determining an error syndrome on a first subset of ancilla qubits of a quantum processor; decoding the error syndrome to produce decoded results on a second subset of ancilla qubits of the quantum processor; applying the decoded results to one or more system qubits; and unconditionally resetting the first subset and/or second subset of ancilla qubits to remove entropy and/or noise from the quantum system, wherein the operations of determining the error syndrome, decoding the error syndrome, applying the error syndrome, and unconditionally resetting the first and/or second subset of ancilla qubits are performed responsive to a qubit controller executing quantum control instructions provided from or derived from a script and without transmitting measurement data related to the error syndrome to a non-quantum computing device.

Abstract: Apparatus and method for actively mitigating coherent errors by modifying an original quantum circuit, inserting Clifford gate operations at intermediate stages. Embodiments of the apparatus and method may perform CGI statically, at the compiling stage, and/or dynamically, at the control processing stage. The insertion of Clifford gates takes advantage of the symmetries in a quantum circuit and actively cancels coherent errors, maintaining the quantum processor in a state as close as possible to the original tune-up environment.

Abstract: Apparatus and method for replacing portions of a quantum circuit with multi-qubit gates. For example, one embodiment of an apparatus comprises: a quantum circuit analyzer to evaluate an original quantum circuit specification including one or more sub-circuits of the original quantum circuit specification, the quantum circuit analyzer to generate results of the evaluation; a quantum circuit generator to generate a new quantum circuit specification based on the results of the evaluation generated by the quantum circuit analyzer, the quantum circuit generator to generate the new quantum circuit specification by, at least in part, replacing the one or more sub-circuits of the original quantum circuit specification with one or more multi-qubit gates.

Abstract: Apparatus and method for a full quantum state simulation. A quantum state simulation system may include a simulation configurator to map quantum register state data of a quantum processor at a first time to a representational data structure and generate a first quantum state image based on the representational data structure. The quantum state simulation system may also include a quantum state simulator to simulate the quantum register state data at a second time using the quantum register state data in the first quantum state image to update a second quantum state image, and store the first and second quantum state images to a data store.

Abstract: Apparatus and method for dynamically adjusting a quantum computer clock frequency. For example, one embodiment of an apparatus comprises: a quantum execution unit to execute quantum operations specified by a quantum runtime; a qubit drive controller to translate the quantum operations into physical pulses directed to qubits on a quantum chip at a first cycle frequency; a spin echo sequencer to issue spin echo command sequences to cause the qubit drive controller to generate a sequence of spin echo pulses at the first cycle frequency; and qubit measurement circuitry to measure the qubits and to store qubit timing data for each qubit, the qubit timing data indicating a coherence time or an amount of computational time available for each qubit to perform quantum operations.

Abstract: Apparatus and method for a full quantum system simulator. For example, one embodiment of a method comprises: initializing a quantum computing system simulator for simulating multiple layers of a quantum system including one or more non-quantum layers and one or more physical quantum device layers of the quantum system; simulating a first set of operations of the one or more non-quantum layers of the quantum system to generate first simulation results; simulating a second set of operations of the one or more quantum device layers of the quantum system to generate second simulation results; analyzing the first and second simulation results to provide at least one configuration recommendation for the quantum system.

Abstract: Apparatus and method for a full quantum system simulator. For example, one embodiment of a method comprises: initializing a quantum computing system simulator for simulating multiple layers of a quantum system including one or more non-quantum layers and one or more physical quantum device layers of the quantum system; simulating a first set of operations of the one or more non-quantum layers of the quantum system to generate first simulation results; simulating a second set of operations of the one or more quantum device layers of the quantum system to generate second simulation results; analyzing the first and second simulation results to provide at least one configuration recommendation for the quantum system.

Abstract: Apparatus and method for hardware-specific quantum circuit synthesis. For example, one embodiment of an apparatus comprises: one or more memory and/or storage devices to store quantum computation specifications and hardware-specific constraints associated with a quantum processor; and a quantum circuit synthesizer to generate a hardware-optimal quantum circuit based on the quantum computation specifications and the hardware-specific constraints.

Abstract: Apparatus and method for replacing portions of a quantum circuit with multi-qubit gates. For example, one embodiment of an apparatus comprises: a quantum circuit analyzer to evaluate an original quantum circuit specification including one or more sub-circuits of the original quantum circuit specification, the quantum circuit analyzer to generate results of the evaluation; a quantum circuit generator to generate a new quantum circuit specification based on the results of the evaluation generated by the quantum circuit analyzer, the quantum circuit generator to generate the new quantum circuit specification by, at least in part, replacing the one or more sub-circuits of the original quantum circuit specification with one or more multi-qubit gates.

Abstract: Apparatus and method for dynamically adjusting a quantum computer clock frequency. For example, one embodiment of an apparatus comprises: a quantum execution unit to execute quantum operations specified by a quantum runtime; a qubit drive controller to translate the quantum operations into physical pulses directed to qubits on a quantum chip at a first cycle frequency; a spin echo sequencer to issue spin echo command sequences to cause the qubit drive controller to generate a sequence of spin echo pulses at the first cycle frequency; and qubit measurement circuitry to measure the qubits and to store qubit timing data for each qubit, the qubit timing data indicating a coherence time or an amount of computational time available for each qubit to perform quantum operations.