Abstract: The present invention relates to a bale cutting apparatus comprising attachment means for coupling the apparatus to a prime mover and a cutting means to cut through a bale containing fodder. The apparatus has cutting means that is operable to retain the bale against a stop member and cut through the bale such that the fodder is discharged from the bale and any bale covering materials are retained by the apparatus. The present invention eliminates the need to separately remove any covering materials in which the fodder is wrapped.

Abstract: Various electronic devices may benefit from appropriate power conservation techniques and tools. For example, low power techniques may benefit small form-factor pluggable applications. An apparatus can include a packet parsing functionality that includes a first order shallow packet parser configured to operate at line rate and a second order deep packet parser configured to operate only on received filtered packets and received packets destined for a management and/or central processing port. The apparatus can also include a microprocessor configured to manage the apparatus and configured to operate at a low duty cycle. The apparatus can further include a packet generator configured to be active only when generating certain packets of interest. The packet parsing function, the microprocessor, and the packet generator can be configured to provide data from a host port of a small form-factor pluggable device toward an optical port of the small form-factor pluggable device.

Abstract: Various electronic devices may benefit from appropriate power conservation techniques and tools. For example, low power techniques may benefit small form-factor pluggable applications. An apparatus can include a packet parsing functionality that includes a first order shallow packet parser configured to operate at line rate and a second order deep packet parser configured to operate only on received filtered packets and received packets destined for a management and/or central processing port. The apparatus can also include a microprocessor configured to manage the apparatus and configured to operate at a low duty cycle. The apparatus can further include a packet generator configured to be active only when generating certain packets of interest. The packet parsing function, the microprocessor, and the packet generator can be configured to provide data from a host port of a small form-factor pluggable device toward an optical port of the small form-factor pluggable device.

Abstract: The present invention relates to a bale cutting apparatus comprising attachment means for coupling the apparatus to a prime mover and a cutting means to cut through a bale containing fodder. The apparatus has cutting means that is operable to retain the bale against a stop member and cut through the bale such that the fodder is discharged from the bale and any bale covering materials are retained by the apparatus. The present invention eliminates the need to separately remove any covering materials in which the fodder is wrapped.

Abstract: A communication system comprises a plurality of interfaces disposed for sending data packets by way of virtual circuit connections and for receiving data packets by way of virtual circuit connections in an asynchronous transfer mode. The interfaces by means of the virtual circuit connections emulate at least one local area network including unit for establishing a virtual circuit connection functioning as a BUS (broadcast and unknown server) for the broadcast of data packets throughout the emulated local area network. An asynchronous transfer mode switch receives packets by way of virtual circuit connections from each of said the interfaces, replicates the packets and sends them to all the other interfaces, thus to establish a mesh between said interfaces. At least one interface comprises a unit for mapping virtual circuit connections between one interface and at least one terminal which is not directly connectable in the mesh connection into virtual circuit connections in the mesh.

Abstract: A system is provided that protects a network from storms of multicast/broadcast data. The system includes a switch or bridge which monitors traffic through it in order to detect the onset of a storm condition from previous receptions of requests for multicasts or broadcasts. Each port or bridge or switch has associated with it one data bit which can be controlled to prevent a storm of multicasts/broadcast data being forwarded to all parts of the switch and jamming the system.

Abstract: A large FIFO memory device has its total available memory capacity partitioned into memory sections. The partitions are in the form of programmable delimiters in order to determine flexibly the size of the memory sections.

Abstract: A method of transmitting over virtual channels in an asynchronous transfer mode data received in the form of data packets which are assembled in addressable buffers. A single distribution and recovery queue is maintained in conjunction with a start distribution pointer, a finish distribution pointer and a recovery pointer which is initially set to the same place as the finish distribution pointer, free buffers being entered in the queue between the start and finish distribution pointers.

Abstract: An address look-up data-base is used to store medial access control addresses for resolution into channel numbers in a system for transmitting data in an asynchronous transfer mode. Static random access memory is used to contain pointer tables, there being a pointer table for each possible priority level in the data packet. Thus a search for the media access control address of a data packet in the content addressable memory yields, among other data, a priority value which when combined with other data points to a location in one of the pointer tables, which accesses the appropriate channel number.

Abstract: Data received in the form of data packets which include destination addresses is transmitted over virtual channels in an asynchronous transfer mode to emulate the operation of a plurality of emulated local area networks. A plurality of bus channels are provided, each specified for the broadcast transmission of data packets to members of a respective one of the emulated local area networks. An address look-up data-base is used to receive the destination address of a data packet and data defining the respective bus channel for the broadcast transmission of that packet in the respective emulated local area network. The data packet is then transmitted over the respective bus channel. The content addressable memory provides a data field which indicates whether a request for the resolution of the destination address into a specific virtual channel number has been made.

Abstract: Apparatus for monitoring and controlling data flow ina computer network device having a plurality of parts comprises control means for directly linking ports together on the basis of additional information stored in the control means whereby incoming packets are linked directly to an utput port to achieve high performance. The additional information is stored in one more look-up tables additional to the normal CAm with the or each table addressed by separate processing. This allows the implementation to be in hardware rather than in software.

Abstract: A direct memory access controller (DMAC) is provided to transfer bytes from arbitrary offset byte boundaries while performing data check operations in parallel to the movement of data in parallel through the DMA controller. The DMA controller moves data during each memory cycle and validates the moved data at the destination memory during the writing of bytes to the destination address.

Abstract: Two devices HR and FR are coupled to a bus with a common memory via a port controller. Device HR requires a high (or maximum) average rate of access, device FR requires a fast response (minimum latency) in establishing access. Request signals HRQ, FRQ from the devices are latched by latches 20 and 21, passed as HRX, FRX through an arbitration or resolver circuit 22 as HRY, FRY to a sequence control unit 23 to initiate an access cycle. Cycle timing is determined by a delay line timebase circuit 24, which responds to a single change of level of a signal DLY (in either direction). Latch 21, when set, generates an request pending signal FRRP which is fed to the HR device to cause it to increase its cycle length so that the FR access cycle will finish before the next HR access cycle is initiated.

Abstract: Loop-back detection and signalling is achieved on any DS-0 channel that conforms to 56 kbps operation such as DDS in a DS-1 digital data transmission system. A standard DS-1 chip set (line interface unit, framer, and link layer controller) is used, coupled to 24 transmit and receive buffer means in the customer main memory. The framer detects control bits by using Channel Associate Signalling, (designed for digitising voice in-band signalling and not normally used for data transmission), in the incoming signal and interrupts the customer CPU, which determines from the framer which channel caused the interrupt, changes the mode of the relevant channel, checks that channel's receive buffer means for loop-back codes, and, if enough successive loop-back codes are found, copies the receive buffer means into the transmit buffer means (with code mapping) for as long as the loop-back condition exists.

Abstract: The present invention is directed to a programmable logic circuit used as an arbiter to control access to a shared resource, e.g. a system bus, by N devices in a computer system. The programmable arbiter according to the present invention, implements a logic design with sufficient flexibility to accommodate and selectively incorporate features of several different arbitration schemes including a straight priority scheme, a programmable arbitration, and a rotating priority arbitration scheme. In addition to these arbitration schemes, the arbiter of the present invention supports an extended programmable arbitration scheme whereby a device which is requesting access to the shared resource may be granted access to the resource even if it has used up its allocated share of bandwidth if there are no other devices requesting access to the shared resource. Furthermore, bus bandwidth may be allocated to particular device or to a group of devices at a particular priority level.