Patents by Inventor Annie Baudrant

Annie Baudrant has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method of fabrication of MOS transistors having electrodes of metallic silicide
    Patent number: 4780429
    Abstract: In a method of fabrication of field-effect transistors having very small dimensions, the gate electrode is formed by a first layer of metallic silicide. Insulating embankments are formed along the lateral edges of the gate and a second layer of metallic silicide is then deposited so as to form the source and drain electrodes. At locations in which the second layer covers the first, planning by planarizing etching is performed so as to produce a structure of flat electrodes in which the gate is separated from the source and drain electrodes by a smaller interval than would be possible in the case of separation by photoetching.
    Type: Grant
    Filed: January 12, 1987
    Date of Patent: October 25, 1988
    Assignee: Societe pour l'Etude et la Fabrication de Circuits Integres Speciaux Efcis
    Inventors: Alain Roche, Joseph Borel, Annie Baudrant
  • Integrated circuit device which includes a continous layer which consists of conducting portions which are of a silicide of a refractory metal and insulating portions which are of an oxide of the metal
    Patent number: 4714951
    Abstract: The invention concerns an integrated circuit the monocrystalline or polycrystalline silicon zones of which the source, gate and drain are covered with tantalum silicide TaSi.sub.2 while the remainder of the slice is covered with portions of a layer of tantalum oxide Ta.sub.2 O.sub.5, especially on the sides of the grids of polycrystalline silicon and on the thick oxide and an aluminum alloy layer comes into contact with the tantalum silicide to form connections with the portions of tantalum silicide.
    Type: Grant
    Filed: February 26, 1986
    Date of Patent: December 22, 1987
    Assignee: Societe pour d'Etude et la Fabrication de Circuits Integres Speciaux EFCIS
    Inventors: Annie Baudrant, Michel Marty
  • Process for manufacturing an integrated circuit with tantalum silicide connections utilizing self-aligned oxidation
    Patent number: 4593454
    Abstract: The invention concerns an integrated circuit the monocrystalline or polycrystalline silicon zones of which the source, gate and drain are covered with tantalum silicide TaSi.sub.2 while the remainder of the slice is covered with portions of a layer of tantalum oxide Ta.sub.2 O.sub.5, especially on the sides of the grids of polycrystalline silicon and on the thick oxide and an aluminum alloy layer comes into contact with the tantalum silicide to form connections with the portions of tantalum silicide.
    Type: Grant
    Filed: November 20, 1984
    Date of Patent: June 10, 1986
    Assignee: Societe pour d'Etude et la Fabrication de Circuits Integres Speciaux EFCS
    Inventors: Annie Baudrant, Michel Marty