Abstract: A railway vehicle is provided, including: a floor, where an opening portion is provided on the floor, two wheel removal and mounting floor panels are disposed in the opening portion, a sub-opening portion is defined between the two wheel removal and mounting floor panels, a wheel is disposed at the sub-opening portion, a part of the wheel passes through the sub-opening portion and protrudes from an upper surface of the floor, the two wheel removal and mounting floor panels are respectively located on two sides of the wheel in a radial direction, and both the two wheel removal and mounting floor panels are detachably connected to the floor; and a wheel cover, covering an upper side of the wheel, and being connected to the two wheel removal and mounting floor panels.

Abstract: A rail vehicle is provided, including: a floor, where an opening portion is formed in the floor, and the opening portion includes a wheel inspection opening and a wheel mounting opening; a wheel, disposed at the wheel mounting opening, where a part of the wheel passes through the wheel mounting opening and protrudes from an upper surface of the floor, and a wheel cover covers an upper side of the wheel; and an inspection floor panel, detachably connected to the wheel inspection opening, where the wheel inspection opening is located on one side of the wheel in a left-right direction of the rail vehicle.

Abstract: The present disclosure provides a forklift, an internal gear pump, and an axial compensation component thereof. The axial compensation component for the internal gear pump is configured to be sandwiched between a pump cover of the internal gear pump and a gear pair of the internal gear pump, and the axial compensation component includes: a floating side plate; and a floating sleeve fixed at a side of the floating side plate far away from the gear pair, in which a part of the floating sleeve is configured to extend into an oil storage tank of the pump cover, the oil storage tank is configured to be in communication with a high-pressure oil area of the internal gear pump, and the floating side plate is configured to press tightly against the gear pair under an oil pressure in the oil storage tank.

Abstract: A new method is provided for the creation of floating gates of a flash memory array. The floating gates of conventional flash memory devices are formed using a single polysilicon deposition followed by a single polysilicon etch. The invention provides a method that allows for the reduction in the spacing between adjacent floating gates by providing a double polysilicon deposition followed by a double polysilicon etch process. The process of the invention starts with the formation of FOX regions in a semiconductor surface; the channel regions of the devices are implanted. The first half of the floating gates of the device are formed followed by the formation of the second half of the floating gates of the device. The control gate of the device is formed as a last step of the processes of the invention.

Abstract: The invention is a method of manufacturing a semiconductor memory device using a novel intergate dielectric stack. A key feature of of the invention is the novel O/N/SiON/O structure, forming a silicon oxynitride layer on the silicon nitride layer. The method begins by forming a first insulating layer and a first conductive layer on a semiconductor substrate having one conductivity type. A second insulating layer is formed on the first conducting layer by sequentially stacking: a first silicon oxide layer; a silicon nitride layer; a silicon oxynitride layer; and a second silicon oxide layer. A second conductive layer is formed on the second insulating layer. The first insulating layer, the first conductive layer, the second insulating layer, and the second conductive layer are patterned to form a floating gate, an intergate dielectric, and a control gate. Finally, a source and drain are formed to complete the memory device.

Abstract: This invention relates to the new reversed flash memory device which has improved electrical performance, yield and reliability because of better control of the dielectric interfaces resulting from first making the poly 2 control gate within the silicon substrate. The reverse structure is novel, as are the described process methods for forming the reverse stacking order.Shallow trenched isolation (STI) is first formed in the p-silicon substrate and encompasses the poly 2 control gate region; then the interpoly dielectric is grown/deposited on that single crystal silicon substrate. The floating poly 1 is formed on top of this uniform interpoly dielectric that has well-controlled surface smoothness. The tunnel oxide layer is formed on the floating poly 1 layer, and the source/drain is implanted on a straddling additional poly layer. There are fewer edges and associated stress weaknesses in the dielectric breakdown of both the reversed interpoly dielectric and the floating tunnel oxide.