Abstract: A voltage controller circuit is provided for dynamic frequency and voltage scaling. The voltage controller circuit receives an error signal indicating a frequency error and a code error. The frequency error indicates a first difference between a target frequency and an actual frequency generated by an oscillator, and the code error indicates a second difference between a minimum code and an actual code with which the oscillator is configured to generate the actual frequency. The minimum code corresponds to a maximum frequency that the oscillator generates for a processor to safely operate under a given voltage. The voltage controller circuit calculates a voltage correction value based on the error signal, a first gain parameter for the frequency error, and a second gain parameter for the code error, and sends a request to a power management circuit to cause an updated voltage to be supplied to the processor.

Abstract: Described herein are improved techniques for measuring propagation delay of an integrated circuit that facilitate performing propagation delay measurements on-chip. Some embodiments relate to an integrated circuit comprising programmable oscillator circuitry with a plurality of oscillator stages that are switchable into and out of a delay path based on control signals from a controller, allowing the same programmable oscillator to generate many different oscillator signals according to the received control signals, for the controller to determine a central tendency and/or variance of propagation delay of the integrated circuit. Some embodiments relate to an integrated circuit including programmable delay paths configured to provide an amount of cell delay and an amount of wire delay based on control signals from a controller, allowing the same programmable delay path to generate signals for measuring delays due to cell and wire delays of the integrated circuit.

Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus is used for performing a scan test on a chip. In certain configurations, the apparatus includes an internal voltage source on a same die of the chip. The internal voltage source receives a constant voltage. The internal voltage source generates an internal voltage based on the constant voltage. The internal voltage is maintained at a lower voltage level in a capture phase of the scan test, and is increased from the lower voltage level to a high voltage level at a start of a shift phase of the scan test and reduced from the high voltage level to the lower voltage level at an end of the shift phase.

Abstract: Described herein are improved techniques for measuring propagation delay of an integrated circuit that facilitate performing propagation delay measurements on-chip. Some embodiments relate to an integrated circuit comprising programmable oscillator circuitry with a plurality of oscillator stages that are switchable into and out of a delay path based on control signals from a controller, allowing the same programmable oscillator to generate many different oscillator signals according to the received control signals, for the controller to determine a central tendency and/or variance of propagation delay of the integrated circuit. Some embodiments relate to an integrated circuit including programmable delay paths configured to provide an amount of cell delay and an amount of wire delay based on control signals from a controller, allowing the same programmable delay path to generate signals for measuring delays due to cell and wire delays of the integrated circuit.

Abstract: An integrated circuit includes a programmable delay path comprising a plurality of path delay tuners configured to receive a plurality of control signals and add to the programmable delay path an amount of cell delay and an amount of wire delay that are based on the plurality of control signals. The integrated circuit further includes a controller configured to provide the plurality of control signals to the programmable delay path, receive a signal from the programmable delay path, and compare the signal to a reference signal.

Abstract: Described herein are improved techniques for measuring propagation delay of an integrated circuit that facilitate performing propagation delay measurements on-chip. Some embodiments relate to an integrated circuit comprising programmable oscillator circuitry with a plurality of oscillator stages that are switchable into and out of a delay path based on control signals from a controller, allowing the same programmable oscillator to generate many different oscillator signals according to the received control signals, for the controller to determine a central tendency and/or variance of propagation delay of the integrated circuit. Some embodiments relate to an integrated circuit including programmable delay paths configured to provide an amount of cell delay and an amount of wire delay based on control signals from a controller, allowing the same programmable delay path to generate signals for measuring delays due to cell and wire delays of the integrated circuit.

Abstract: Described herein are improved techniques for measuring propagation delay of an integrated circuit that facilitate performing propagation delay measurements on-chip. Some embodiments relate to an integrated circuit comprising programmable oscillator circuitry with a plurality of oscillator stages that are switchable into and out of a delay path based on control signals from a controller, allowing the same programmable oscillator to generate many different oscillator signals according to the received control signals, for the controller to determine a central tendency and/or variance of propagation delay of the integrated circuit. Some embodiments relate to an integrated circuit including programmable delay paths configured to provide an amount of cell delay and an amount of wire delay based on control signals from a controller, allowing the same programmable delay path to generate signals for measuring delays due to cell and wire delays of the integrated circuit.